Abstract
This paper presents guidelines for the design and optimization of on-chip coils used for wirelessly-powered mm-scale neural implants. Since available real estate is limited, on-chip coil design involves managing difficult trade-offs between the number of turns, trace width and spacing, proximity to other active circuits and metalization, quality factor, matching network performance/size, and load impedance conditions, all towards achieving high power transfer efficiency. To illustrate the design optimization procedure, a 3 × 3 mm2 on-chip coil is designed, and measurement results reveal a 3.82 % power transfer efficiency for a 1.6 kΩ load that mimics a 100 μW neural interface.
| Original language | English (US) |
|---|---|
| Title of host publication | 2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 1-4 |
| Number of pages | 4 |
| Volume | 2018-January |
| ISBN (Electronic) | 9781509058037 |
| DOIs | |
| State | Published - Mar 23 2018 |
| Event | 2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Torino, Italy Duration: Oct 19 2017 → Oct 21 2017 |
Other
| Other | 2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 |
|---|---|
| Country | Italy |
| City | Torino |
| Period | 10/19/17 → 10/21/17 |
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ASJC Scopus subject areas
- Biomedical Engineering
- Electrical and Electronic Engineering
- Instrumentation
Cite this
Wireless powering of mm-scale fully-on-chip neural interfaces. / Park, Jiwoong; Kim, Chul; Akinin, Abraham; Ha, Sohmyung; Cauwenberghs, Gert; Mercier, Patrick P.
2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings. Vol. 2018-January Institute of Electrical and Electronics Engineers Inc., 2018. p. 1-4.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Wireless powering of mm-scale fully-on-chip neural interfaces
AU - Park, Jiwoong
AU - Kim, Chul
AU - Akinin, Abraham
AU - Ha, Sohmyung
AU - Cauwenberghs, Gert
AU - Mercier, Patrick P.
PY - 2018/3/23
Y1 - 2018/3/23
N2 - This paper presents guidelines for the design and optimization of on-chip coils used for wirelessly-powered mm-scale neural implants. Since available real estate is limited, on-chip coil design involves managing difficult trade-offs between the number of turns, trace width and spacing, proximity to other active circuits and metalization, quality factor, matching network performance/size, and load impedance conditions, all towards achieving high power transfer efficiency. To illustrate the design optimization procedure, a 3 × 3 mm2 on-chip coil is designed, and measurement results reveal a 3.82 % power transfer efficiency for a 1.6 kΩ load that mimics a 100 μW neural interface.
AB - This paper presents guidelines for the design and optimization of on-chip coils used for wirelessly-powered mm-scale neural implants. Since available real estate is limited, on-chip coil design involves managing difficult trade-offs between the number of turns, trace width and spacing, proximity to other active circuits and metalization, quality factor, matching network performance/size, and load impedance conditions, all towards achieving high power transfer efficiency. To illustrate the design optimization procedure, a 3 × 3 mm2 on-chip coil is designed, and measurement results reveal a 3.82 % power transfer efficiency for a 1.6 kΩ load that mimics a 100 μW neural interface.
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UR - http://www.scopus.com/inward/citedby.url?scp=85050020116&partnerID=8YFLogxK
U2 - 10.1109/BIOCAS.2017.8325186
DO - 10.1109/BIOCAS.2017.8325186
M3 - Conference contribution
VL - 2018-January
SP - 1
EP - 4
BT - 2017 IEEE Biomedical Circuits and Systems Conference, BioCAS 2017 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
ER -