VLSI testing based security metric for IC camouflaging

Jeyavijayan Rajendran, Ozgur Sinanoglu, Ramesh Karri

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An Integrated Circuit (IC) can be reverse engineered by imaging its layout and reconstructing the netlist. IC camouflaging is a layout-level technique that hampers imaging-based reverse engineering by using, in one embodiment, functionally different standard cells that look alike. Reverse engineering will fail if the functionality of a camouflaged gate cannot be correctly resolved. We adapt VLSI testing principles (justification and sensitization) to quantify the ability of a reverse engineer to unambiguously resolve the functionality of look-alike camouflaged gates. We evaluate the security of look-alike standard cells based IC camouflaging by applying it on the controllers in OpenSPARC T1 processor.

Original languageEnglish (US)
Title of host publicationProceedings - 2013 IEEE International Test Conference, ITC 2013
DOIs
StatePublished - 2013
Event44th IEEE International Test Conference, ITC 2013 - Anaheim, CA, United States
Duration: Sep 10 2013Sep 12 2013

Other

Other44th IEEE International Test Conference, ITC 2013
CountryUnited States
CityAnaheim, CA
Period9/10/139/12/13

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Alike
Integrated Circuits
Integrated circuits
Reverse engineering
Reverse Engineering
Metric
Testing
Layout
Reverse
Imaging
Imaging techniques
Embodiment
Cell
Justification
Resolve
Quantify
Controller
Engineers
Controllers
Evaluate

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Applied Mathematics

Cite this

Rajendran, J., Sinanoglu, O., & Karri, R. (2013). VLSI testing based security metric for IC camouflaging. In Proceedings - 2013 IEEE International Test Conference, ITC 2013 [6651879] https://doi.org/10.1109/TEST.2013.6651879

VLSI testing based security metric for IC camouflaging. / Rajendran, Jeyavijayan; Sinanoglu, Ozgur; Karri, Ramesh.

Proceedings - 2013 IEEE International Test Conference, ITC 2013. 2013. 6651879.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Rajendran, J, Sinanoglu, O & Karri, R 2013, VLSI testing based security metric for IC camouflaging. in Proceedings - 2013 IEEE International Test Conference, ITC 2013., 6651879, 44th IEEE International Test Conference, ITC 2013, Anaheim, CA, United States, 9/10/13. https://doi.org/10.1109/TEST.2013.6651879
Rajendran J, Sinanoglu O, Karri R. VLSI testing based security metric for IC camouflaging. In Proceedings - 2013 IEEE International Test Conference, ITC 2013. 2013. 6651879 https://doi.org/10.1109/TEST.2013.6651879
Rajendran, Jeyavijayan ; Sinanoglu, Ozgur ; Karri, Ramesh. / VLSI testing based security metric for IC camouflaging. Proceedings - 2013 IEEE International Test Conference, ITC 2013. 2013.
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