ThUnderVolt

Enabling aggressive voltage underscaling and timing error resilience for energy efficient deep learning accelerators

Jeff Zhang, Kartheek Rangineni, Zahra Ghodsi, Siddharth Garg

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Hardware accelerators are being increasingly deployed to boost the performance and energy efficiency of deep neural network (DNN) inference. In this paper we propose Thundervolt, a new framework that enables aggressive voltage underscaling of high-performance DNN accelerators without compromising classification accuracy even in the presence of high timing error rates. Using post-synthesis timing simulations of a DNN accelerator modeled on the Google TPU, we show that Thundervolt enables between 34%-57% energy savings on state-of-the-art speech and image recognition benchmarks with less than 1% loss in classification accuracy and no performance loss. Further, we show that Thundervolt is synergistic with and can further increase the energy efficiency of commonly used run-time DNN pruning techniques like Zero-Skip.

Original languageEnglish (US)
Title of host publicationProceedings of the 55th Annual Design Automation Conference, DAC 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
VolumePart F137710
ISBN (Print)9781450357005
DOIs
StatePublished - Jun 24 2018
Event55th Annual Design Automation Conference, DAC 2018 - San Francisco, United States
Duration: Jun 24 2018Jun 29 2018

Other

Other55th Annual Design Automation Conference, DAC 2018
CountryUnited States
CitySan Francisco
Period6/24/186/29/18

Fingerprint

Error Resilience
Accelerator
Energy Efficient
Particle accelerators
Timing
Voltage
Neural Networks
Electric potential
Energy Efficiency
Energy efficiency
Hardware Accelerator
Image recognition
Image Recognition
Energy Saving
Speech Recognition
Pruning
Speech recognition
Error Rate
Energy conservation
High Performance

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation

Cite this

Zhang, J., Rangineni, K., Ghodsi, Z., & Garg, S. (2018). ThUnderVolt: Enabling aggressive voltage underscaling and timing error resilience for energy efficient deep learning accelerators. In Proceedings of the 55th Annual Design Automation Conference, DAC 2018 (Vol. Part F137710). [a19] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1145/3195970.3196129

ThUnderVolt : Enabling aggressive voltage underscaling and timing error resilience for energy efficient deep learning accelerators. / Zhang, Jeff; Rangineni, Kartheek; Ghodsi, Zahra; Garg, Siddharth.

Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Vol. Part F137710 Institute of Electrical and Electronics Engineers Inc., 2018. a19.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Zhang, J, Rangineni, K, Ghodsi, Z & Garg, S 2018, ThUnderVolt: Enabling aggressive voltage underscaling and timing error resilience for energy efficient deep learning accelerators. in Proceedings of the 55th Annual Design Automation Conference, DAC 2018. vol. Part F137710, a19, Institute of Electrical and Electronics Engineers Inc., 55th Annual Design Automation Conference, DAC 2018, San Francisco, United States, 6/24/18. https://doi.org/10.1145/3195970.3196129
Zhang J, Rangineni K, Ghodsi Z, Garg S. ThUnderVolt: Enabling aggressive voltage underscaling and timing error resilience for energy efficient deep learning accelerators. In Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Vol. Part F137710. Institute of Electrical and Electronics Engineers Inc. 2018. a19 https://doi.org/10.1145/3195970.3196129
Zhang, Jeff ; Rangineni, Kartheek ; Ghodsi, Zahra ; Garg, Siddharth. / ThUnderVolt : Enabling aggressive voltage underscaling and timing error resilience for energy efficient deep learning accelerators. Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Vol. Part F137710 Institute of Electrical and Electronics Engineers Inc., 2018.
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