Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: A system-level perspective

Siddharth Garg, Diana Marculescu, Radu Marculescu, Umit Ogras

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we consider the case of network-on-chip (NoC) based multiple-processor systems-on-chip (MPSoCs) implemented using multiple voltage and frequency islands (VFIs) that rely on fine-grained dynamic voltage and frequency scaling (DVFS) for run-time control of the system power dissipation. Specifically, we present a framework to compute theoretical bounds on the performance of DVFS controllers for such systems under the impact of three important technology driven constraints: (i) reliability and temperature driven upper limits on the maximum supply voltage; (ii) inductive noise driven constraints on the maximum rate of change of voltage/frequency; and (iii) increasing manufacturing process variations. Our experimental results show that, for the benchmarks considered, any DVFS control algorithm will lose up to 87% performance, measured in terms of the number of steps required to reach a reference steady state, in the presence of maximum frequency and maximum frequency increment constraints. In addition, increasing process variations can lead to up to 60% of fabricated chips being unable to meet the specified DVFS control specifications, irrespective of the DVFS algorithm used.

Original languageEnglish (US)
Title of host publication2009 46th ACM/IEEE Design Automation Conference, DAC 2009
Pages818-821
Number of pages4
StatePublished - 2009
Event2009 46th ACM/IEEE Design Automation Conference, DAC 2009 - San Francisco, CA, United States
Duration: Jul 26 2009Jul 31 2009

Other

Other2009 46th ACM/IEEE Design Automation Conference, DAC 2009
CountryUnited States
CitySan Francisco, CA
Period7/26/097/31/09

Fingerprint

Controllability
Voltage
Scaling
Electric potential
Process Variation
Computer networks
Microprocessor chips
Energy dissipation
Design
Voltage scaling
Dynamic frequency scaling
Specifications
Rate of change
Controllers
Power System
Increment
Control Algorithm
Dissipation
Chip
Manufacturing

Keywords

  • Networks-on-chip
  • Performance bounds
  • Power management

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation

Cite this

Garg, S., Marculescu, D., Marculescu, R., & Ogras, U. (2009). Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: A system-level perspective. In 2009 46th ACM/IEEE Design Automation Conference, DAC 2009 (pp. 818-821). [5227050]

Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs : A system-level perspective. / Garg, Siddharth; Marculescu, Diana; Marculescu, Radu; Ogras, Umit.

2009 46th ACM/IEEE Design Automation Conference, DAC 2009. 2009. p. 818-821 5227050.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Garg, S, Marculescu, D, Marculescu, R & Ogras, U 2009, Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: A system-level perspective. in 2009 46th ACM/IEEE Design Automation Conference, DAC 2009., 5227050, pp. 818-821, 2009 46th ACM/IEEE Design Automation Conference, DAC 2009, San Francisco, CA, United States, 7/26/09.
Garg S, Marculescu D, Marculescu R, Ogras U. Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: A system-level perspective. In 2009 46th ACM/IEEE Design Automation Conference, DAC 2009. 2009. p. 818-821. 5227050
Garg, Siddharth ; Marculescu, Diana ; Marculescu, Radu ; Ogras, Umit. / Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs : A system-level perspective. 2009 46th ACM/IEEE Design Automation Conference, DAC 2009. 2009. pp. 818-821
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