Testing designs implemented in a Field Programmable Gate Array (FPGA) against hardware-based attacks requires one to inject numerous classes of vulnerabilities (e.g., hardware Trojans) into the FPGA based designs. We developed a Tool for Automated INsertion of Trojans (TAINT) providing numerous benefits. First, TAINT can evaluate FPGA based designs against known and unknown attacks. Second, TAINT can insert Trojans at different stages in the FPGA based design cycle such as the Register-Transfer Logic and the post-synthesis translate, map, and route. Moreover, TAINT offers fine-grained controls to a user to precisely insert Trojans in particular FPGA resources. Most importantly, TAINT can automate Trojan Testing. Our experiments will use TAINT to explore the attack spaces at the pre-and post-synthesis stages of a FPGA design.