System-level throughput analysis for process variation aware multiple voltage-frequency island designs

Siddharth Garg, Diana Marculescu

Research output: Contribution to journalArticle

Abstract

The increasing variability in manufacturing process parameters is expected to lead to significant performance degradation in deep submicron technologies. Multiple Voltage-Frequency Island (VFI) design styles with fine-grained, process-variation aware clocking have recently been shown to possess increased immunity to manufacturing process variations. In this article, we propose a theoretical framework that allows designers to quantify the performance improvement that is to be expected if they were to migrate from a fully synchronous design to the proposed multiple VFI design style. Specifically, we provide techniques to efficiently and accurately estimate the probability distribution of the execution rate (or throughput) of both single and multiple VFI systems under the influence of manufacturing process variations. Finally, using an MPEG-2 encoder benchmark, we demonstrate how the proposed analysis framework can be used by designers to make architectural decisions such as the granularity of VFI domain partitioning based on the throughput constraints their systems are required to satisfy.

Original languageEnglish (US)
Article number59
JournalACM Transactions on Design Automation of Electronic Systems
Volume13
Issue number4
DOIs
StatePublished - Sep 1 2008

Fingerprint

Throughput
Electric potential
Probability distributions
Degradation

Keywords

  • Globally asynchronous locally synchronous
  • Manufacturing process variations
  • Maximum cycle mean
  • Performance analysis
  • System-level design
  • Voltage-frequency islands

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

Cite this

@article{3145a16af10c422c8001079b475df18e,
title = "System-level throughput analysis for process variation aware multiple voltage-frequency island designs",
abstract = "The increasing variability in manufacturing process parameters is expected to lead to significant performance degradation in deep submicron technologies. Multiple Voltage-Frequency Island (VFI) design styles with fine-grained, process-variation aware clocking have recently been shown to possess increased immunity to manufacturing process variations. In this article, we propose a theoretical framework that allows designers to quantify the performance improvement that is to be expected if they were to migrate from a fully synchronous design to the proposed multiple VFI design style. Specifically, we provide techniques to efficiently and accurately estimate the probability distribution of the execution rate (or throughput) of both single and multiple VFI systems under the influence of manufacturing process variations. Finally, using an MPEG-2 encoder benchmark, we demonstrate how the proposed analysis framework can be used by designers to make architectural decisions such as the granularity of VFI domain partitioning based on the throughput constraints their systems are required to satisfy.",
keywords = "Globally asynchronous locally synchronous, Manufacturing process variations, Maximum cycle mean, Performance analysis, System-level design, Voltage-frequency islands",
author = "Siddharth Garg and Diana Marculescu",
year = "2008",
month = "9",
day = "1",
doi = "10.1145/1391962.1391967",
language = "English (US)",
volume = "13",
journal = "ACM Transactions on Design Automation of Electronic Systems",
issn = "1084-4309",
publisher = "Association for Computing Machinery (ACM)",
number = "4",

}

TY - JOUR

T1 - System-level throughput analysis for process variation aware multiple voltage-frequency island designs

AU - Garg, Siddharth

AU - Marculescu, Diana

PY - 2008/9/1

Y1 - 2008/9/1

N2 - The increasing variability in manufacturing process parameters is expected to lead to significant performance degradation in deep submicron technologies. Multiple Voltage-Frequency Island (VFI) design styles with fine-grained, process-variation aware clocking have recently been shown to possess increased immunity to manufacturing process variations. In this article, we propose a theoretical framework that allows designers to quantify the performance improvement that is to be expected if they were to migrate from a fully synchronous design to the proposed multiple VFI design style. Specifically, we provide techniques to efficiently and accurately estimate the probability distribution of the execution rate (or throughput) of both single and multiple VFI systems under the influence of manufacturing process variations. Finally, using an MPEG-2 encoder benchmark, we demonstrate how the proposed analysis framework can be used by designers to make architectural decisions such as the granularity of VFI domain partitioning based on the throughput constraints their systems are required to satisfy.

AB - The increasing variability in manufacturing process parameters is expected to lead to significant performance degradation in deep submicron technologies. Multiple Voltage-Frequency Island (VFI) design styles with fine-grained, process-variation aware clocking have recently been shown to possess increased immunity to manufacturing process variations. In this article, we propose a theoretical framework that allows designers to quantify the performance improvement that is to be expected if they were to migrate from a fully synchronous design to the proposed multiple VFI design style. Specifically, we provide techniques to efficiently and accurately estimate the probability distribution of the execution rate (or throughput) of both single and multiple VFI systems under the influence of manufacturing process variations. Finally, using an MPEG-2 encoder benchmark, we demonstrate how the proposed analysis framework can be used by designers to make architectural decisions such as the granularity of VFI domain partitioning based on the throughput constraints their systems are required to satisfy.

KW - Globally asynchronous locally synchronous

KW - Manufacturing process variations

KW - Maximum cycle mean

KW - Performance analysis

KW - System-level design

KW - Voltage-frequency islands

UR - http://www.scopus.com/inward/record.url?scp=53849083495&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=53849083495&partnerID=8YFLogxK

U2 - 10.1145/1391962.1391967

DO - 10.1145/1391962.1391967

M3 - Article

VL - 13

JO - ACM Transactions on Design Automation of Electronic Systems

JF - ACM Transactions on Design Automation of Electronic Systems

SN - 1084-4309

IS - 4

M1 - 59

ER -