Synthesizing linear array algorithms from nested for loop algorithms

Peizong Lee, Zvi Kedem

Research output: Contribution to journalArticle

Abstract

The mapping of algorithms structured as depth-p nested FOR loops into special-purpose systolic VLSI linear arrays is addressed. The mappings are done by using linear functions to transform the original sequential algorithms into a form suitable for parallel execution on linear arrays. A feasible mapping is derived by identifying formal criteria to be satisfied by both the original sequential algorithm and the proposed transformation function. The criteria define the universe of feasible solutions and thus allow large families of transformations to be derived. The target transformation can then be chosen using additional criteria, among them the minimal execution time, smallest number of processors to be used, or the requirement to use a processor with specific characteristics. The methodology is illustrated by synthesizing algorithms for matrix multiplication and a version of the Warshall-Floyd transitive closure algorithm.

Original languageEnglish (US)
Pages (from-to)1578-1598
Number of pages21
JournalIEEE Transactions on Computers
Volume37
Issue number12
DOIs
StatePublished - Dec 1988

Fingerprint

Linear Array
Sequential Algorithm
Transitive Closure
Matrix multiplication
Linear Function
Execution Time
Transform
Target
Methodology
Requirements

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Synthesizing linear array algorithms from nested for loop algorithms. / Lee, Peizong; Kedem, Zvi.

In: IEEE Transactions on Computers, Vol. 37, No. 12, 12.1988, p. 1578-1598.

Research output: Contribution to journalArticle

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