Abstract
Fabrication-less integrated circuit (IC) design houses outsource fabrication to third-party foundries to reduce cost of manufacturing. The outsourcing of IC fabrication, beyond our expectation, raises concerns regarding intellectual property (IP) piracy and theft by rogue elements in the third-party foundries. Obfuscation techniques have been proposed to increase resistance to reverse engineering, IP recovery, IP theft, and piracy. However, prior work on obfuscation for IP protection has primarily applied to the gate level or the layout level. As a result, it can signifcantly impact the performance of the original design in addition to requiring redesign of standard cells. In this article, we propose a high-level synthesis and analysis (HLSA)-based obfuscation approach for IP protection. The proposed method is based on split manufacturing. Additional dummy units and MUXes can be added to further obfuscate the design. The proposed technique aligns with the standard-cell-based design methodologies and does not signifcantly impact the performance of the original design. Our experimental results confrm that the proposed approach can provide high levels of IC obfuscation with moderate area cost.
| Original language | English (US) |
|---|---|
| Article number | 11 |
| Journal | ACM Journal on Emerging Technologies in Computing Systems |
| Volume | 15 |
| Issue number | 1 |
| DOIs | |
| State | Published - Jan 1 2019 |
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Keywords
- High-level synthesis and analysis
- IP piracy
- Obfuscation
- RT-level
- Split manufacturing
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering
Cite this
Split manufacturing-based register transfer-level obfuscation. / Cui, Xiaotong; Zhang, Jeff Jun; Wu, Kaijie; Garg, Siddharth; Karri, Ramesh.
In: ACM Journal on Emerging Technologies in Computing Systems, Vol. 15, No. 1, 11, 01.01.2019.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Split manufacturing-based register transfer-level obfuscation
AU - Cui, Xiaotong
AU - Zhang, Jeff Jun
AU - Wu, Kaijie
AU - Garg, Siddharth
AU - Karri, Ramesh
PY - 2019/1/1
Y1 - 2019/1/1
N2 - Fabrication-less integrated circuit (IC) design houses outsource fabrication to third-party foundries to reduce cost of manufacturing. The outsourcing of IC fabrication, beyond our expectation, raises concerns regarding intellectual property (IP) piracy and theft by rogue elements in the third-party foundries. Obfuscation techniques have been proposed to increase resistance to reverse engineering, IP recovery, IP theft, and piracy. However, prior work on obfuscation for IP protection has primarily applied to the gate level or the layout level. As a result, it can signifcantly impact the performance of the original design in addition to requiring redesign of standard cells. In this article, we propose a high-level synthesis and analysis (HLSA)-based obfuscation approach for IP protection. The proposed method is based on split manufacturing. Additional dummy units and MUXes can be added to further obfuscate the design. The proposed technique aligns with the standard-cell-based design methodologies and does not signifcantly impact the performance of the original design. Our experimental results confrm that the proposed approach can provide high levels of IC obfuscation with moderate area cost.
AB - Fabrication-less integrated circuit (IC) design houses outsource fabrication to third-party foundries to reduce cost of manufacturing. The outsourcing of IC fabrication, beyond our expectation, raises concerns regarding intellectual property (IP) piracy and theft by rogue elements in the third-party foundries. Obfuscation techniques have been proposed to increase resistance to reverse engineering, IP recovery, IP theft, and piracy. However, prior work on obfuscation for IP protection has primarily applied to the gate level or the layout level. As a result, it can signifcantly impact the performance of the original design in addition to requiring redesign of standard cells. In this article, we propose a high-level synthesis and analysis (HLSA)-based obfuscation approach for IP protection. The proposed method is based on split manufacturing. Additional dummy units and MUXes can be added to further obfuscate the design. The proposed technique aligns with the standard-cell-based design methodologies and does not signifcantly impact the performance of the original design. Our experimental results confrm that the proposed approach can provide high levels of IC obfuscation with moderate area cost.
KW - High-level synthesis and analysis
KW - IP piracy
KW - Obfuscation
KW - RT-level
KW - Split manufacturing
UR - http://www.scopus.com/inward/record.url?scp=85061228691&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85061228691&partnerID=8YFLogxK
U2 - 10.1145/3289156
DO - 10.1145/3289156
M3 - Article
AN - SCOPUS:85061228691
VL - 15
JO - ACM Journal on Emerging Technologies in Computing Systems
JF - ACM Journal on Emerging Technologies in Computing Systems
SN - 1550-4832
IS - 1
M1 - 11
ER -