Sneak-path testing of crossbar-based nonvolatile random access memories

Sachhidh Kannan, Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu

Research output: Contribution to journalArticle

Abstract

Emerging nonvolatile memory (NVM) technologies, such as resistive random access memories (RRAM) and phase-change memories (PCM), are an attractive option for future memory architectures due to their nonvolatility, high density, and low-power operation. Notwithstanding these advantages, they are prone to high defect densities due to the nondeterministic nature of the nanoscale fabrication. We examine the fault models and propose an efficient testing technique to test crossbar-based NVMs. The typical approach to testing memories entails testing one memory element at a time. This is time consuming and does not scale for the dense, RRAM or PCM-based memories. We propose a testing scheme based on 'sneak-path sensing' to efficiently detect faults in the memory. The testing scheme uses sneak paths inherent in crossbar memories, to test multiple memory elements at the same time, thereby reducing testing time. We designed the design-for-test support necessary to control the number of sneak paths that are concurrently enabled; this helps control the power consumed during test. The proposed scheme enables and leverages sneak paths during test mode, while still maintaining a sneak path free crossbar during normal operation.

Original languageEnglish (US)
Article number6482250
Pages (from-to)413-426
Number of pages14
JournalIEEE Transactions on Nanotechnology
Volume12
Issue number3
DOIs
StatePublished - 2013

Fingerprint

Data storage equipment
Testing
Phase change memory
Memory architecture
Defect density
Fabrication

Keywords

  • Memristors
  • nonvolatile memory (NVM)
  • phase-change memory (PCM)
  • testing

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Science Applications

Cite this

Sneak-path testing of crossbar-based nonvolatile random access memories. / Kannan, Sachhidh; Rajendran, Jeyavijayan; Karri, Ramesh; Sinanoglu, Ozgur.

In: IEEE Transactions on Nanotechnology, Vol. 12, No. 3, 6482250, 2013, p. 413-426.

Research output: Contribution to journalArticle

Kannan, Sachhidh ; Rajendran, Jeyavijayan ; Karri, Ramesh ; Sinanoglu, Ozgur. / Sneak-path testing of crossbar-based nonvolatile random access memories. In: IEEE Transactions on Nanotechnology. 2013 ; Vol. 12, No. 3. pp. 413-426.
@article{e4dcb66a573e47ba8df6cafea9fcdeef,
title = "Sneak-path testing of crossbar-based nonvolatile random access memories",
abstract = "Emerging nonvolatile memory (NVM) technologies, such as resistive random access memories (RRAM) and phase-change memories (PCM), are an attractive option for future memory architectures due to their nonvolatility, high density, and low-power operation. Notwithstanding these advantages, they are prone to high defect densities due to the nondeterministic nature of the nanoscale fabrication. We examine the fault models and propose an efficient testing technique to test crossbar-based NVMs. The typical approach to testing memories entails testing one memory element at a time. This is time consuming and does not scale for the dense, RRAM or PCM-based memories. We propose a testing scheme based on 'sneak-path sensing' to efficiently detect faults in the memory. The testing scheme uses sneak paths inherent in crossbar memories, to test multiple memory elements at the same time, thereby reducing testing time. We designed the design-for-test support necessary to control the number of sneak paths that are concurrently enabled; this helps control the power consumed during test. The proposed scheme enables and leverages sneak paths during test mode, while still maintaining a sneak path free crossbar during normal operation.",
keywords = "Memristors, nonvolatile memory (NVM), phase-change memory (PCM), testing",
author = "Sachhidh Kannan and Jeyavijayan Rajendran and Ramesh Karri and Ozgur Sinanoglu",
year = "2013",
doi = "10.1109/TNANO.2013.2253329",
language = "English (US)",
volume = "12",
pages = "413--426",
journal = "IEEE Transactions on Nanotechnology",
issn = "1536-125X",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "3",

}

TY - JOUR

T1 - Sneak-path testing of crossbar-based nonvolatile random access memories

AU - Kannan, Sachhidh

AU - Rajendran, Jeyavijayan

AU - Karri, Ramesh

AU - Sinanoglu, Ozgur

PY - 2013

Y1 - 2013

N2 - Emerging nonvolatile memory (NVM) technologies, such as resistive random access memories (RRAM) and phase-change memories (PCM), are an attractive option for future memory architectures due to their nonvolatility, high density, and low-power operation. Notwithstanding these advantages, they are prone to high defect densities due to the nondeterministic nature of the nanoscale fabrication. We examine the fault models and propose an efficient testing technique to test crossbar-based NVMs. The typical approach to testing memories entails testing one memory element at a time. This is time consuming and does not scale for the dense, RRAM or PCM-based memories. We propose a testing scheme based on 'sneak-path sensing' to efficiently detect faults in the memory. The testing scheme uses sneak paths inherent in crossbar memories, to test multiple memory elements at the same time, thereby reducing testing time. We designed the design-for-test support necessary to control the number of sneak paths that are concurrently enabled; this helps control the power consumed during test. The proposed scheme enables and leverages sneak paths during test mode, while still maintaining a sneak path free crossbar during normal operation.

AB - Emerging nonvolatile memory (NVM) technologies, such as resistive random access memories (RRAM) and phase-change memories (PCM), are an attractive option for future memory architectures due to their nonvolatility, high density, and low-power operation. Notwithstanding these advantages, they are prone to high defect densities due to the nondeterministic nature of the nanoscale fabrication. We examine the fault models and propose an efficient testing technique to test crossbar-based NVMs. The typical approach to testing memories entails testing one memory element at a time. This is time consuming and does not scale for the dense, RRAM or PCM-based memories. We propose a testing scheme based on 'sneak-path sensing' to efficiently detect faults in the memory. The testing scheme uses sneak paths inherent in crossbar memories, to test multiple memory elements at the same time, thereby reducing testing time. We designed the design-for-test support necessary to control the number of sneak paths that are concurrently enabled; this helps control the power consumed during test. The proposed scheme enables and leverages sneak paths during test mode, while still maintaining a sneak path free crossbar during normal operation.

KW - Memristors

KW - nonvolatile memory (NVM)

KW - phase-change memory (PCM)

KW - testing

UR - http://www.scopus.com/inward/record.url?scp=84877844855&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84877844855&partnerID=8YFLogxK

U2 - 10.1109/TNANO.2013.2253329

DO - 10.1109/TNANO.2013.2253329

M3 - Article

VL - 12

SP - 413

EP - 426

JO - IEEE Transactions on Nanotechnology

JF - IEEE Transactions on Nanotechnology

SN - 1536-125X

IS - 3

M1 - 6482250

ER -