Simulation and experimental results for class D series resonant inverter

Dariusz Czarkowski, Marian K. Kazimierczuk

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A numerical analysis of a Class D zero-voltage switching inverter in the time domain is presented, together with experimental results. A discrete-time state-space approach is used for simulation. The algorithm is fast, easy to implement, and suitable for systems with high spikes in the waveforms. Analysis shows that switching losses can be reduced by using a dead time in the transistor drive voltage and adding a single capacitor in parallel with one of the transistors. Zero-voltage switching can be achieved above the resonant frequency and in a limited range of load resistances. Numerical results are in good agreement with experimental ones.

Original languageEnglish (US)
Title of host publicationProceedings - 14th International Telecommunications Energy Conference, INTELEC 1992
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages153-159
Number of pages7
ISBN (Electronic)0780307798
DOIs
StatePublished - Jan 1 1992
Event14th International Telecommunications Energy Conference, INTELEC 1992 - Washington, United States
Duration: Oct 4 1992Oct 8 1992

Publication series

NameINTELEC, International Telecommunications Energy Conference (Proceedings)
ISSN (Print)0275-0473

Conference

Conference14th International Telecommunications Energy Conference, INTELEC 1992
CountryUnited States
CityWashington
Period10/4/9210/8/92

Fingerprint

Zero voltage switching
Transistors
Numerical analysis
Natural frequencies
Capacitors
Electric potential

ASJC Scopus subject areas

  • Energy Engineering and Power Technology
  • Electrical and Electronic Engineering

Cite this

Czarkowski, D., & Kazimierczuk, M. K. (1992). Simulation and experimental results for class D series resonant inverter. In Proceedings - 14th International Telecommunications Energy Conference, INTELEC 1992 (pp. 153-159). [268448] (INTELEC, International Telecommunications Energy Conference (Proceedings)). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/INTLEC.1992.268448

Simulation and experimental results for class D series resonant inverter. / Czarkowski, Dariusz; Kazimierczuk, Marian K.

Proceedings - 14th International Telecommunications Energy Conference, INTELEC 1992. Institute of Electrical and Electronics Engineers Inc., 1992. p. 153-159 268448 (INTELEC, International Telecommunications Energy Conference (Proceedings)).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Czarkowski, D & Kazimierczuk, MK 1992, Simulation and experimental results for class D series resonant inverter. in Proceedings - 14th International Telecommunications Energy Conference, INTELEC 1992., 268448, INTELEC, International Telecommunications Energy Conference (Proceedings), Institute of Electrical and Electronics Engineers Inc., pp. 153-159, 14th International Telecommunications Energy Conference, INTELEC 1992, Washington, United States, 10/4/92. https://doi.org/10.1109/INTLEC.1992.268448
Czarkowski D, Kazimierczuk MK. Simulation and experimental results for class D series resonant inverter. In Proceedings - 14th International Telecommunications Energy Conference, INTELEC 1992. Institute of Electrical and Electronics Engineers Inc. 1992. p. 153-159. 268448. (INTELEC, International Telecommunications Energy Conference (Proceedings)). https://doi.org/10.1109/INTLEC.1992.268448
Czarkowski, Dariusz ; Kazimierczuk, Marian K. / Simulation and experimental results for class D series resonant inverter. Proceedings - 14th International Telecommunications Energy Conference, INTELEC 1992. Institute of Electrical and Electronics Engineers Inc., 1992. pp. 153-159 (INTELEC, International Telecommunications Energy Conference (Proceedings)).
@inproceedings{fe7dd55effd84b26b7e8033aa81865bf,
title = "Simulation and experimental results for class D series resonant inverter",
abstract = "A numerical analysis of a Class D zero-voltage switching inverter in the time domain is presented, together with experimental results. A discrete-time state-space approach is used for simulation. The algorithm is fast, easy to implement, and suitable for systems with high spikes in the waveforms. Analysis shows that switching losses can be reduced by using a dead time in the transistor drive voltage and adding a single capacitor in parallel with one of the transistors. Zero-voltage switching can be achieved above the resonant frequency and in a limited range of load resistances. Numerical results are in good agreement with experimental ones.",
author = "Dariusz Czarkowski and Kazimierczuk, {Marian K.}",
year = "1992",
month = "1",
day = "1",
doi = "10.1109/INTLEC.1992.268448",
language = "English (US)",
series = "INTELEC, International Telecommunications Energy Conference (Proceedings)",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "153--159",
booktitle = "Proceedings - 14th International Telecommunications Energy Conference, INTELEC 1992",

}

TY - GEN

T1 - Simulation and experimental results for class D series resonant inverter

AU - Czarkowski, Dariusz

AU - Kazimierczuk, Marian K.

PY - 1992/1/1

Y1 - 1992/1/1

N2 - A numerical analysis of a Class D zero-voltage switching inverter in the time domain is presented, together with experimental results. A discrete-time state-space approach is used for simulation. The algorithm is fast, easy to implement, and suitable for systems with high spikes in the waveforms. Analysis shows that switching losses can be reduced by using a dead time in the transistor drive voltage and adding a single capacitor in parallel with one of the transistors. Zero-voltage switching can be achieved above the resonant frequency and in a limited range of load resistances. Numerical results are in good agreement with experimental ones.

AB - A numerical analysis of a Class D zero-voltage switching inverter in the time domain is presented, together with experimental results. A discrete-time state-space approach is used for simulation. The algorithm is fast, easy to implement, and suitable for systems with high spikes in the waveforms. Analysis shows that switching losses can be reduced by using a dead time in the transistor drive voltage and adding a single capacitor in parallel with one of the transistors. Zero-voltage switching can be achieved above the resonant frequency and in a limited range of load resistances. Numerical results are in good agreement with experimental ones.

UR - http://www.scopus.com/inward/record.url?scp=33749897784&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33749897784&partnerID=8YFLogxK

U2 - 10.1109/INTLEC.1992.268448

DO - 10.1109/INTLEC.1992.268448

M3 - Conference contribution

T3 - INTELEC, International Telecommunications Energy Conference (Proceedings)

SP - 153

EP - 159

BT - Proceedings - 14th International Telecommunications Energy Conference, INTELEC 1992

PB - Institute of Electrical and Electronics Engineers Inc.

ER -