Silica-Embedded Silicon Nanophotonic On-Chip Networks

Elena Kakoulli, Vassos Soteriou Soteriou, Charalambos Koutsides, Kyriacos Kalli

    Research output: Contribution to journalArticle

    Abstract

    On-chip nanophotonics offer high throughput, yet energy-efficient communication, traits that can prove critical to the continuance of multicore chip scalability. In this paper, we investigate and propose silicon nanophotonic components that are embedded entirely in the silica (SiO2) substrate, i.e., reside subsurface, as opposed to die on-surface silicon nanophotonics of prior-art. Among several offered advantages, such silicon-in-silica (SiS) nanophotonic structures empower the implementation of nonobstructive interconnect geometries that deliver an improved power-performance balance, as demonstrated experimentally. First, using exhaustive simulations based on commercial-grade optical software-based tools, we show that such SiS structures are feasible, and derive their geometry characteristics and design parameters. As a second step, utilizing SiS optical channels and filters, we then design two distinct SiS-based nanophotonic network-on-chip (PNoC) mesh-diagonal links topologies as a means of demonstrating our proof of concept. In further pushing the performance envelope, we next develop: 1) an associated contention-aware adaptive routing function and 2) a parallelized photonic channel allocation scheme, with both coupled to SiS-based PNoCs as elements, to respectively replace under-performing routing and flow-control photonic protocols currently utilized. An extensive experimental evaluation, including utilizing traffic benchmarks gathered from full-system chip multiprocessor simulations, shows that our methodology boosts network throughput by up to 59.7%, reduces communication latency by up to 78.7%, while improving the throughput-to-power ratio by up to 31.6% when compared to the state-of-the-art.

    Original languageEnglish (US)
    Pages (from-to)978-991
    Number of pages14
    JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
    Volume36
    Issue number6
    DOIs
    StatePublished - Jun 1 2017

    Fingerprint

    Nanophotonics
    Silica
    Silicon
    Throughput
    Photonics
    Geometry
    Communication
    Network-on-chip
    Flow control
    Scalability
    Topology
    Substrates

    Keywords

    • Adaptive routing algorithm
    • flow-control
    • nanophotonic network-on-chip (PNoC)
    • silicon-in-silica (SiS)
    • topology

    ASJC Scopus subject areas

    • Software
    • Computer Graphics and Computer-Aided Design
    • Electrical and Electronic Engineering

    Cite this

    Silica-Embedded Silicon Nanophotonic On-Chip Networks. / Kakoulli, Elena; Soteriou, Vassos Soteriou; Koutsides, Charalambos; Kalli, Kyriacos.

    In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 36, No. 6, 01.06.2017, p. 978-991.

    Research output: Contribution to journalArticle

    Kakoulli, Elena ; Soteriou, Vassos Soteriou ; Koutsides, Charalambos ; Kalli, Kyriacos. / Silica-Embedded Silicon Nanophotonic On-Chip Networks. In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2017 ; Vol. 36, No. 6. pp. 978-991.
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