Scan architecture with align-encode

Research output: Contribution to journalArticle

Abstract

Scan architectures that provide compression capabilities have become mandatory due to the unbearable test costs imposed by high test data volume and prolonged test application. To alleviate these test costs, a stimulus decompressor and a response compactor block are inserted between the tester channels and the scan chains. As a result, a few tester channels drive a larger number of scan chains. In such an architecture, whether a particular test pattern can be delivered depends on the care bit distribution of that pattern. In this paper, we introduce a hardware block to be utilized in conjunction with a combinational stimulus decompressor block. This block, namely, Align-Encode, provides a deterministic per pattern control over care bit distribution of test vectors, improving pattern deliverability, and thus, the effectiveness of the particular stimulus decompressor. Align-Encode is reconfigured on a per pattern basis to delay the shift-in operations in selected scan chains. The number of cycles that a chain may be delayed can be between zero and the maximum allowable value, in order to align the scan slices in such a way that originally undeliverable test vectors become encodable. The reconfigurability of Align-Encode provides a test pattern independent solution, wherein any given set of test vectors can be analyzed to compute the proper delay information. We present efficient techniques for computing the scan chain delay values that lead to pattern encodability. Experimental results also justify the test pattern encodability enhancements that Align-Encode delivers, enabling significant test quality improvements and/or test cost reductions.

Original languageEnglish (US)
Article number4670068
Pages (from-to)2303-2316
Number of pages14
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume27
Issue number12
DOIs
StatePublished - Dec 1 2008

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Cost reduction
Costs
Hardware

Keywords

  • Align-encode
  • Stimulus decompressor
  • Test data compression
  • Test data encoding

ASJC Scopus subject areas

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

Cite this

Scan architecture with align-encode. / Sinanoglu, Ozgur.

In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 27, No. 12, 4670068, 01.12.2008, p. 2303-2316.

Research output: Contribution to journalArticle

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