Reconfigurable Concurrent Error Detection adaptive to dynamicity of power constraints

Sobeeh Almukhaizim, Sara Bunian, Ozgur Sinanoglu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this preliminary study, we evaluate a reconfigurable low-power duplication-based Concurrent Error Detection (CED) infrastructure for logic circuits. The key idea is to enable/disable the operation of the duplicate circuit, resulting in the retention of the input values to the duplicate circuit (i.e., reduction in power dissipation) at the cost of some reduction in CED coverage. The results indicate that power dissipation is commensurate with CED coverage, motivating the use of LFSR structures to easily generate and reconfigure conditions, enabling their dynamic adjustment to adapt to the power constraints of the system.

Original languageEnglish (US)
Title of host publication2010 15th IEEE European Test Symposium, ETS'10
Number of pages1
DOIs
StatePublished - Nov 3 2010
Event2010 15th IEEE European Test Symposium, ETS'10 - Prague, Czech Republic
Duration: May 24 2010May 28 2010

Publication series

Name2010 15th IEEE European Test Symposium, ETS'10

Other

Other2010 15th IEEE European Test Symposium, ETS'10
CountryCzech Republic
CityPrague
Period5/24/105/28/10

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Almukhaizim, S., Bunian, S., & Sinanoglu, O. (2010). Reconfigurable Concurrent Error Detection adaptive to dynamicity of power constraints. In 2010 15th IEEE European Test Symposium, ETS'10 [5512745] (2010 15th IEEE European Test Symposium, ETS'10). https://doi.org/10.1109/ETSYM.2010.5512745