Power optimization for universal hash function data path using divide-and-concatenate technique

Bo Yang, Ramesh Karri

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We present an architecture level low power design technique called divide-and-concatenate for universal hash functions based on the following observations: (i) the power consumption of a w-bit array multiplier and associated universal hash data path decreases as O(w4) if its clock rate remains constant, (ii) two universal hash functions are equivalent if they have the same collision probability property. In the proposed approach we divide a w-bit data path (with collision probability 2-w) into two/four w/2-bit data paths (each with collision probability 2-w/2) and concatenate their results to construct an equivalent w-bit data path (with a collision probability 2-w). A popular low power technique that uses parallel data paths saves 62.10% dynamic power consumption incurring 102% area overhead. In contrast, the divide-and-concatenate technique saves 55.44% dynamic power consumption with only 16% area overhead.

Original languageEnglish (US)
Title of host publicationCODES+ISSS 2005 - International Conference on Hardware/Software Codesign and Systems Synthesis
Pages219-224
Number of pages6
StatePublished - 2005
Event3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis CODES+ISSS 2005 - Jersey City, NJ, United States
Duration: Sep 18 2005Sep 21 2005

Other

Other3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis CODES+ISSS 2005
CountryUnited States
CityJersey City, NJ
Period9/18/059/21/05

Fingerprint

Hash functions
Electric power utilization
Clocks

Keywords

  • Divide-and-Concatenate
  • Power Optimization
  • Universal Hash Function

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Yang, B., & Karri, R. (2005). Power optimization for universal hash function data path using divide-and-concatenate technique. In CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and Systems Synthesis (pp. 219-224)

Power optimization for universal hash function data path using divide-and-concatenate technique. / Yang, Bo; Karri, Ramesh.

CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and Systems Synthesis. 2005. p. 219-224.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Yang, B & Karri, R 2005, Power optimization for universal hash function data path using divide-and-concatenate technique. in CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and Systems Synthesis. pp. 219-224, 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis CODES+ISSS 2005, Jersey City, NJ, United States, 9/18/05.
Yang B, Karri R. Power optimization for universal hash function data path using divide-and-concatenate technique. In CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and Systems Synthesis. 2005. p. 219-224
Yang, Bo ; Karri, Ramesh. / Power optimization for universal hash function data path using divide-and-concatenate technique. CODES+ISSS 2005 - International Conference on Hardware/Software Codesign and Systems Synthesis. 2005. pp. 219-224
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