Optimizing energy to minimize errors in dataflow graphs using approximate adders

Zvi Kedem, Vincent Mooney, Kirthi Krishna Muntimadugu, Krishna V. Palem, Avani Devarasetty, Phani Deepak Parasuramuni

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Approximate arithmetic is a promising, new approach to low-energy designs while tackling reliability issues. We present a method to optimally distribute a given energy budget among adders in a dataflow graph so as to minimize expected errors. The method is based on new formal mathematical models and algorithms, which quantitatively characterize the relative importance of the adders in a circuit. We demonstrate this method on a finite impulse response filter and a Fast Fourier Transform. The optimized energy distribution yields 2:05X lower error in a 16-point FFT and images with SNR 1:42X higher than those achieved by the best previous approach.

Original languageEnglish (US)
Title of host publicationEmbedded Systems Week 2010 - Proceedings of the 2010 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES'10
Pages177-186
Number of pages10
DOIs
StatePublished - 2010
Event6th Embedded Systems Week 2010, ESWEEK 2010 - 2010 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES'10 - Scottsdale, AZ, United States
Duration: Oct 24 2010Oct 29 2010

Other

Other6th Embedded Systems Week 2010, ESWEEK 2010 - 2010 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES'10
CountryUnited States
CityScottsdale, AZ
Period10/24/1010/29/10

Fingerprint

Adders
Fast Fourier transforms
FIR filters
Mathematical models
Networks (circuits)

Keywords

  • Approximate computation
  • Dsp circuits
  • Energy consumption minimization
  • Voltage scaling

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture

Cite this

Kedem, Z., Mooney, V., Muntimadugu, K. K., Palem, K. V., Devarasetty, A., & Parasuramuni, P. D. (2010). Optimizing energy to minimize errors in dataflow graphs using approximate adders. In Embedded Systems Week 2010 - Proceedings of the 2010 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES'10 (pp. 177-186) https://doi.org/10.1145/1878921.1878948

Optimizing energy to minimize errors in dataflow graphs using approximate adders. / Kedem, Zvi; Mooney, Vincent; Muntimadugu, Kirthi Krishna; Palem, Krishna V.; Devarasetty, Avani; Parasuramuni, Phani Deepak.

Embedded Systems Week 2010 - Proceedings of the 2010 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES'10. 2010. p. 177-186.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Kedem, Z, Mooney, V, Muntimadugu, KK, Palem, KV, Devarasetty, A & Parasuramuni, PD 2010, Optimizing energy to minimize errors in dataflow graphs using approximate adders. in Embedded Systems Week 2010 - Proceedings of the 2010 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES'10. pp. 177-186, 6th Embedded Systems Week 2010, ESWEEK 2010 - 2010 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES'10, Scottsdale, AZ, United States, 10/24/10. https://doi.org/10.1145/1878921.1878948
Kedem Z, Mooney V, Muntimadugu KK, Palem KV, Devarasetty A, Parasuramuni PD. Optimizing energy to minimize errors in dataflow graphs using approximate adders. In Embedded Systems Week 2010 - Proceedings of the 2010 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES'10. 2010. p. 177-186 https://doi.org/10.1145/1878921.1878948
Kedem, Zvi ; Mooney, Vincent ; Muntimadugu, Kirthi Krishna ; Palem, Krishna V. ; Devarasetty, Avani ; Parasuramuni, Phani Deepak. / Optimizing energy to minimize errors in dataflow graphs using approximate adders. Embedded Systems Week 2010 - Proceedings of the 2010 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES'10. 2010. pp. 177-186
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