Molecular-beam epitaxy growth of device-compatible GaAs on silicon substrates with thin (∼80 nm) Si1-x Gex step-graded buffer layers for high- κ III-V metal-oxide-semiconductor field effect transistor applications

Michael M. Oye, Davood Shahrjerdi, Injo Ok, Jeffrey B. Hurst, Shannon D. Lewis, Sagnik Dey, David Q. Kelly, Sachin Joshi, Terry J. Mattord, Xiaojun Yu, Mark A. Wistey, James S. Harris, Archie L. Holmes, Jack C. Lee, Sanjay K. Banerjee

Research output: Contribution to journalArticle

Abstract

The authors report the fabrication of TaN-Hf O2 -GaAs metal-oxide- semiconductor capacitors on silicon substrates. GaAs was grown by migration-enhanced epitaxy (MEE) on Si substrates using an ∼80-nm -thick Si1-x Gex step-graded buffer layer, which was grown by ultrahigh vacuum chemical vapor deposition. The MEE growth temperatures for GaAs were 375 and 400 °C, with GaAs layer thicknesses of 15 and 30 nm. We observed an optimal MEE growth condition at 400 °C using a 30 nm GaAs layer. Growth temperatures in excess of 400 °C resulted in semiconductor surfaces rougher than 1 nm rms, which were unsuitable for the subsequent deposition of a 6.5-nm -thick Hf O2 gate dielectric. A minimum GaAs thickness of 30 nm was necessary to obtain reasonable capacitance-voltage (C-V) characteristics from the GaAs layers grown on Si substrates. To improve the interface properties between Hf O2 and GaAs, a thin 1.5 nm Ge interfacial layer was grown by molecular-beam epitaxy in situ after the GaAs growth. The Ge-passivated GaAs samples were then transferred in air for the subsequent ex situ Hf O2 formation. This Ge interfacial layer in between Hf O2 and GaAs was necessary to avoid relatively flat C-V characteristics that are symptomatic of high interface state densities.

Original languageEnglish (US)
Pages (from-to)1098-1102
Number of pages5
JournalJournal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
Volume25
Issue number3
DOIs
StatePublished - 2007

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MOSFET devices
Buffer layers
Epitaxial growth
Molecular beam epitaxy
metal oxide semiconductors
molecular beam epitaxy
field effect transistors
buffers
Growth temperature
Silicon
silicon
Capacitance
Substrates
epitaxy
capacitance-voltage characteristics
Interface states
Gate dielectrics
Ultrahigh vacuum
Electric potential
Chemical vapor deposition

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Surfaces and Interfaces
  • Physics and Astronomy (miscellaneous)

Cite this

Molecular-beam epitaxy growth of device-compatible GaAs on silicon substrates with thin (∼80 nm) Si1-x Gex step-graded buffer layers for high- κ III-V metal-oxide-semiconductor field effect transistor applications. / Oye, Michael M.; Shahrjerdi, Davood; Ok, Injo; Hurst, Jeffrey B.; Lewis, Shannon D.; Dey, Sagnik; Kelly, David Q.; Joshi, Sachin; Mattord, Terry J.; Yu, Xiaojun; Wistey, Mark A.; Harris, James S.; Holmes, Archie L.; Lee, Jack C.; Banerjee, Sanjay K.

In: Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures, Vol. 25, No. 3, 2007, p. 1098-1102.

Research output: Contribution to journalArticle

Oye, Michael M. ; Shahrjerdi, Davood ; Ok, Injo ; Hurst, Jeffrey B. ; Lewis, Shannon D. ; Dey, Sagnik ; Kelly, David Q. ; Joshi, Sachin ; Mattord, Terry J. ; Yu, Xiaojun ; Wistey, Mark A. ; Harris, James S. ; Holmes, Archie L. ; Lee, Jack C. ; Banerjee, Sanjay K. / Molecular-beam epitaxy growth of device-compatible GaAs on silicon substrates with thin (∼80 nm) Si1-x Gex step-graded buffer layers for high- κ III-V metal-oxide-semiconductor field effect transistor applications. In: Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures. 2007 ; Vol. 25, No. 3. pp. 1098-1102.
@article{462ccaab28444410936c4d3ca3473472,
title = "Molecular-beam epitaxy growth of device-compatible GaAs on silicon substrates with thin (∼80 nm) Si1-x Gex step-graded buffer layers for high- κ III-V metal-oxide-semiconductor field effect transistor applications",
abstract = "The authors report the fabrication of TaN-Hf O2 -GaAs metal-oxide- semiconductor capacitors on silicon substrates. GaAs was grown by migration-enhanced epitaxy (MEE) on Si substrates using an ∼80-nm -thick Si1-x Gex step-graded buffer layer, which was grown by ultrahigh vacuum chemical vapor deposition. The MEE growth temperatures for GaAs were 375 and 400 °C, with GaAs layer thicknesses of 15 and 30 nm. We observed an optimal MEE growth condition at 400 °C using a 30 nm GaAs layer. Growth temperatures in excess of 400 °C resulted in semiconductor surfaces rougher than 1 nm rms, which were unsuitable for the subsequent deposition of a 6.5-nm -thick Hf O2 gate dielectric. A minimum GaAs thickness of 30 nm was necessary to obtain reasonable capacitance-voltage (C-V) characteristics from the GaAs layers grown on Si substrates. To improve the interface properties between Hf O2 and GaAs, a thin 1.5 nm Ge interfacial layer was grown by molecular-beam epitaxy in situ after the GaAs growth. The Ge-passivated GaAs samples were then transferred in air for the subsequent ex situ Hf O2 formation. This Ge interfacial layer in between Hf O2 and GaAs was necessary to avoid relatively flat C-V characteristics that are symptomatic of high interface state densities.",
author = "Oye, {Michael M.} and Davood Shahrjerdi and Injo Ok and Hurst, {Jeffrey B.} and Lewis, {Shannon D.} and Sagnik Dey and Kelly, {David Q.} and Sachin Joshi and Mattord, {Terry J.} and Xiaojun Yu and Wistey, {Mark A.} and Harris, {James S.} and Holmes, {Archie L.} and Lee, {Jack C.} and Banerjee, {Sanjay K.}",
year = "2007",
doi = "10.1116/1.2713119",
language = "English (US)",
volume = "25",
pages = "1098--1102",
journal = "Journal of Vacuum Science & Technology B: Microelectronics Processing and Phenomena",
issn = "1071-1023",
publisher = "AVS Science and Technology Society",
number = "3",

}

TY - JOUR

T1 - Molecular-beam epitaxy growth of device-compatible GaAs on silicon substrates with thin (∼80 nm) Si1-x Gex step-graded buffer layers for high- κ III-V metal-oxide-semiconductor field effect transistor applications

AU - Oye, Michael M.

AU - Shahrjerdi, Davood

AU - Ok, Injo

AU - Hurst, Jeffrey B.

AU - Lewis, Shannon D.

AU - Dey, Sagnik

AU - Kelly, David Q.

AU - Joshi, Sachin

AU - Mattord, Terry J.

AU - Yu, Xiaojun

AU - Wistey, Mark A.

AU - Harris, James S.

AU - Holmes, Archie L.

AU - Lee, Jack C.

AU - Banerjee, Sanjay K.

PY - 2007

Y1 - 2007

N2 - The authors report the fabrication of TaN-Hf O2 -GaAs metal-oxide- semiconductor capacitors on silicon substrates. GaAs was grown by migration-enhanced epitaxy (MEE) on Si substrates using an ∼80-nm -thick Si1-x Gex step-graded buffer layer, which was grown by ultrahigh vacuum chemical vapor deposition. The MEE growth temperatures for GaAs were 375 and 400 °C, with GaAs layer thicknesses of 15 and 30 nm. We observed an optimal MEE growth condition at 400 °C using a 30 nm GaAs layer. Growth temperatures in excess of 400 °C resulted in semiconductor surfaces rougher than 1 nm rms, which were unsuitable for the subsequent deposition of a 6.5-nm -thick Hf O2 gate dielectric. A minimum GaAs thickness of 30 nm was necessary to obtain reasonable capacitance-voltage (C-V) characteristics from the GaAs layers grown on Si substrates. To improve the interface properties between Hf O2 and GaAs, a thin 1.5 nm Ge interfacial layer was grown by molecular-beam epitaxy in situ after the GaAs growth. The Ge-passivated GaAs samples were then transferred in air for the subsequent ex situ Hf O2 formation. This Ge interfacial layer in between Hf O2 and GaAs was necessary to avoid relatively flat C-V characteristics that are symptomatic of high interface state densities.

AB - The authors report the fabrication of TaN-Hf O2 -GaAs metal-oxide- semiconductor capacitors on silicon substrates. GaAs was grown by migration-enhanced epitaxy (MEE) on Si substrates using an ∼80-nm -thick Si1-x Gex step-graded buffer layer, which was grown by ultrahigh vacuum chemical vapor deposition. The MEE growth temperatures for GaAs were 375 and 400 °C, with GaAs layer thicknesses of 15 and 30 nm. We observed an optimal MEE growth condition at 400 °C using a 30 nm GaAs layer. Growth temperatures in excess of 400 °C resulted in semiconductor surfaces rougher than 1 nm rms, which were unsuitable for the subsequent deposition of a 6.5-nm -thick Hf O2 gate dielectric. A minimum GaAs thickness of 30 nm was necessary to obtain reasonable capacitance-voltage (C-V) characteristics from the GaAs layers grown on Si substrates. To improve the interface properties between Hf O2 and GaAs, a thin 1.5 nm Ge interfacial layer was grown by molecular-beam epitaxy in situ after the GaAs growth. The Ge-passivated GaAs samples were then transferred in air for the subsequent ex situ Hf O2 formation. This Ge interfacial layer in between Hf O2 and GaAs was necessary to avoid relatively flat C-V characteristics that are symptomatic of high interface state densities.

UR - http://www.scopus.com/inward/record.url?scp=34249889965&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=34249889965&partnerID=8YFLogxK

U2 - 10.1116/1.2713119

DO - 10.1116/1.2713119

M3 - Article

AN - SCOPUS:34249889965

VL - 25

SP - 1098

EP - 1102

JO - Journal of Vacuum Science & Technology B: Microelectronics Processing and Phenomena

JF - Journal of Vacuum Science & Technology B: Microelectronics Processing and Phenomena

SN - 1071-1023

IS - 3

ER -