Logic gate implementation for gray-scale morphology

Reitseng Lin, Edward Wong

    Research output: Contribution to journalArticle

    Abstract

    In this paper, we show that the direct logic gate implementation of gray-scale morphology can be modified using threshold decomposition principle. The resulting new architecture has the advantage that the number of logic levels is not sensitive to structuring element size increases, yet it requires much less number of logic gates than a previously reported architecture having the same advantage.

    Original languageEnglish (US)
    Pages (from-to)481-487
    Number of pages7
    JournalPattern Recognition Letters
    Volume13
    Issue number7
    DOIs
    StatePublished - 1992

    Fingerprint

    Logic gates
    Decomposition

    Keywords

    • Architecture
    • dilation
    • erosion
    • gray-scale morphology
    • image processing
    • stacking property
    • threshold decomposition

    ASJC Scopus subject areas

    • Computer Vision and Pattern Recognition
    • Signal Processing
    • Electrical and Electronic Engineering

    Cite this

    Logic gate implementation for gray-scale morphology. / Lin, Reitseng; Wong, Edward.

    In: Pattern Recognition Letters, Vol. 13, No. 7, 1992, p. 481-487.

    Research output: Contribution to journalArticle

    Lin, Reitseng ; Wong, Edward. / Logic gate implementation for gray-scale morphology. In: Pattern Recognition Letters. 1992 ; Vol. 13, No. 7. pp. 481-487.
    @article{765f260990ff497ba587bd7e6ab69cd7,
    title = "Logic gate implementation for gray-scale morphology",
    abstract = "In this paper, we show that the direct logic gate implementation of gray-scale morphology can be modified using threshold decomposition principle. The resulting new architecture has the advantage that the number of logic levels is not sensitive to structuring element size increases, yet it requires much less number of logic gates than a previously reported architecture having the same advantage.",
    keywords = "Architecture, dilation, erosion, gray-scale morphology, image processing, stacking property, threshold decomposition",
    author = "Reitseng Lin and Edward Wong",
    year = "1992",
    doi = "10.1016/0167-8655(92)90065-8",
    language = "English (US)",
    volume = "13",
    pages = "481--487",
    journal = "Pattern Recognition Letters",
    issn = "0167-8655",
    publisher = "Elsevier",
    number = "7",

    }

    TY - JOUR

    T1 - Logic gate implementation for gray-scale morphology

    AU - Lin, Reitseng

    AU - Wong, Edward

    PY - 1992

    Y1 - 1992

    N2 - In this paper, we show that the direct logic gate implementation of gray-scale morphology can be modified using threshold decomposition principle. The resulting new architecture has the advantage that the number of logic levels is not sensitive to structuring element size increases, yet it requires much less number of logic gates than a previously reported architecture having the same advantage.

    AB - In this paper, we show that the direct logic gate implementation of gray-scale morphology can be modified using threshold decomposition principle. The resulting new architecture has the advantage that the number of logic levels is not sensitive to structuring element size increases, yet it requires much less number of logic gates than a previously reported architecture having the same advantage.

    KW - Architecture

    KW - dilation

    KW - erosion

    KW - gray-scale morphology

    KW - image processing

    KW - stacking property

    KW - threshold decomposition

    UR - http://www.scopus.com/inward/record.url?scp=0027046333&partnerID=8YFLogxK

    UR - http://www.scopus.com/inward/citedby.url?scp=0027046333&partnerID=8YFLogxK

    U2 - 10.1016/0167-8655(92)90065-8

    DO - 10.1016/0167-8655(92)90065-8

    M3 - Article

    AN - SCOPUS:0027046333

    VL - 13

    SP - 481

    EP - 487

    JO - Pattern Recognition Letters

    JF - Pattern Recognition Letters

    SN - 0167-8655

    IS - 7

    ER -