Large-scale multicast output buffered ATM switch

H. Jonathan Chao, Byeong Seog Choe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper proposes a recursive modular architecture for implementing a large-scale Multicast Output Buffered ATM Switch (MOBAS). Many proposed multicast switch architectures have a size limitation problem because their switches use either (1) a centralized processing unit for cell replication and routing, (2) a shared medium for cell transmission and storage, or (3) an irregular interconnection network for switching. However, in our proposed architecture, the four major functions of designing a multicast switch; cell replication, cell routing, cell contention resolution, and cell addressing, are all performed distributedly so that a large switch size is achievable. Multicast Knockout Principle, an extension of Generalized Knockout Principle, is applied in constructing the entire switch fabric in order to reduce the hardware complexity (e.g., the number of switch elements and interconnection wires) by almost one order of magnitude. The proposed MOBAS has a regular and uniform structure and, thus, has the advantages of: (1) easy expansion due to the modular structure, (2) high integration density for VLSL implementation, (3) relaxed synchronization for data and clock signals, and (4) building the center switch fabric with a single type of chip. A two-stage structure of the multicase output buffered ATM switch (MOBAS) is described. The performance of the switch fabric in the cell loss probability is analyzed, and some numerical results are shown. A 16 × 16 ATM crosspoint switch chip based on the proposed architecture has been implemented using CMOS 2-μm technology and tested to operate correctly.

Original languageEnglish (US)
Title of host publicationIEEE Global Telecommunications Conference
PublisherPubl by IEEE
Pages34-41
Number of pages8
Volume1
ISBN (Print)0780309170
StatePublished - 1993
EventProceedings of the IEEE Global Telecommunications Conference. Part 1 (of 4) - Houston, TX, USA
Duration: Nov 29 1993Dec 2 1993

Other

OtherProceedings of the IEEE Global Telecommunications Conference. Part 1 (of 4)
CityHouston, TX, USA
Period11/29/9312/2/93

Fingerprint

Automatic teller machines
Switches
Clocks
Synchronization
Wire
Hardware

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Chao, H. J., & Choe, B. S. (1993). Large-scale multicast output buffered ATM switch. In IEEE Global Telecommunications Conference (Vol. 1, pp. 34-41). Publ by IEEE.

Large-scale multicast output buffered ATM switch. / Chao, H. Jonathan; Choe, Byeong Seog.

IEEE Global Telecommunications Conference. Vol. 1 Publ by IEEE, 1993. p. 34-41.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Chao, HJ & Choe, BS 1993, Large-scale multicast output buffered ATM switch. in IEEE Global Telecommunications Conference. vol. 1, Publ by IEEE, pp. 34-41, Proceedings of the IEEE Global Telecommunications Conference. Part 1 (of 4), Houston, TX, USA, 11/29/93.
Chao HJ, Choe BS. Large-scale multicast output buffered ATM switch. In IEEE Global Telecommunications Conference. Vol. 1. Publ by IEEE. 1993. p. 34-41
Chao, H. Jonathan ; Choe, Byeong Seog. / Large-scale multicast output buffered ATM switch. IEEE Global Telecommunications Conference. Vol. 1 Publ by IEEE, 1993. pp. 34-41
@inproceedings{0c19a7dcd7b04a2bab420be73fd859a8,
title = "Large-scale multicast output buffered ATM switch",
abstract = "This paper proposes a recursive modular architecture for implementing a large-scale Multicast Output Buffered ATM Switch (MOBAS). Many proposed multicast switch architectures have a size limitation problem because their switches use either (1) a centralized processing unit for cell replication and routing, (2) a shared medium for cell transmission and storage, or (3) an irregular interconnection network for switching. However, in our proposed architecture, the four major functions of designing a multicast switch; cell replication, cell routing, cell contention resolution, and cell addressing, are all performed distributedly so that a large switch size is achievable. Multicast Knockout Principle, an extension of Generalized Knockout Principle, is applied in constructing the entire switch fabric in order to reduce the hardware complexity (e.g., the number of switch elements and interconnection wires) by almost one order of magnitude. The proposed MOBAS has a regular and uniform structure and, thus, has the advantages of: (1) easy expansion due to the modular structure, (2) high integration density for VLSL implementation, (3) relaxed synchronization for data and clock signals, and (4) building the center switch fabric with a single type of chip. A two-stage structure of the multicase output buffered ATM switch (MOBAS) is described. The performance of the switch fabric in the cell loss probability is analyzed, and some numerical results are shown. A 16 × 16 ATM crosspoint switch chip based on the proposed architecture has been implemented using CMOS 2-μm technology and tested to operate correctly.",
author = "Chao, {H. Jonathan} and Choe, {Byeong Seog}",
year = "1993",
language = "English (US)",
isbn = "0780309170",
volume = "1",
pages = "34--41",
booktitle = "IEEE Global Telecommunications Conference",
publisher = "Publ by IEEE",

}

TY - GEN

T1 - Large-scale multicast output buffered ATM switch

AU - Chao, H. Jonathan

AU - Choe, Byeong Seog

PY - 1993

Y1 - 1993

N2 - This paper proposes a recursive modular architecture for implementing a large-scale Multicast Output Buffered ATM Switch (MOBAS). Many proposed multicast switch architectures have a size limitation problem because their switches use either (1) a centralized processing unit for cell replication and routing, (2) a shared medium for cell transmission and storage, or (3) an irregular interconnection network for switching. However, in our proposed architecture, the four major functions of designing a multicast switch; cell replication, cell routing, cell contention resolution, and cell addressing, are all performed distributedly so that a large switch size is achievable. Multicast Knockout Principle, an extension of Generalized Knockout Principle, is applied in constructing the entire switch fabric in order to reduce the hardware complexity (e.g., the number of switch elements and interconnection wires) by almost one order of magnitude. The proposed MOBAS has a regular and uniform structure and, thus, has the advantages of: (1) easy expansion due to the modular structure, (2) high integration density for VLSL implementation, (3) relaxed synchronization for data and clock signals, and (4) building the center switch fabric with a single type of chip. A two-stage structure of the multicase output buffered ATM switch (MOBAS) is described. The performance of the switch fabric in the cell loss probability is analyzed, and some numerical results are shown. A 16 × 16 ATM crosspoint switch chip based on the proposed architecture has been implemented using CMOS 2-μm technology and tested to operate correctly.

AB - This paper proposes a recursive modular architecture for implementing a large-scale Multicast Output Buffered ATM Switch (MOBAS). Many proposed multicast switch architectures have a size limitation problem because their switches use either (1) a centralized processing unit for cell replication and routing, (2) a shared medium for cell transmission and storage, or (3) an irregular interconnection network for switching. However, in our proposed architecture, the four major functions of designing a multicast switch; cell replication, cell routing, cell contention resolution, and cell addressing, are all performed distributedly so that a large switch size is achievable. Multicast Knockout Principle, an extension of Generalized Knockout Principle, is applied in constructing the entire switch fabric in order to reduce the hardware complexity (e.g., the number of switch elements and interconnection wires) by almost one order of magnitude. The proposed MOBAS has a regular and uniform structure and, thus, has the advantages of: (1) easy expansion due to the modular structure, (2) high integration density for VLSL implementation, (3) relaxed synchronization for data and clock signals, and (4) building the center switch fabric with a single type of chip. A two-stage structure of the multicase output buffered ATM switch (MOBAS) is described. The performance of the switch fabric in the cell loss probability is analyzed, and some numerical results are shown. A 16 × 16 ATM crosspoint switch chip based on the proposed architecture has been implemented using CMOS 2-μm technology and tested to operate correctly.

UR - http://www.scopus.com/inward/record.url?scp=0027814211&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0027814211&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0027814211

SN - 0780309170

VL - 1

SP - 34

EP - 41

BT - IEEE Global Telecommunications Conference

PB - Publ by IEEE

ER -