Hybrid silicon CMOS-carbon nanotube physically unclonable functions

Darren Armstrong, Bayan Nasri, Ramesh Karri, Davood Shahrjerdi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Physically unclonable functions (PUFs) are used to uniquely identify electronic devices. Here, we introduce a hybrid silicon CMOS-nanotube PUF circuit that uses the variations of nanotube transistors to generate a random response. An analog silicon circuit subsequently converts the nanotube response to zero or one bits. We fabricate an array of nanotube transistors to study and model their device variability. The behavior of the hybrid CMOS-nanotube PUF is then simulated. The parameters of the analog circuit are tuned to achieve the desired normalized Hamming inter-distance of 0.5. The co-design of the nanotube array and the silicon CMOS is an attractive feature for increasing the immunity of the hybrid PUF against an unauthorized duplication. The heterogeneous integration of nanotubes with silicon CMOS offers a new strategy for realizing security tokens that are strong, low-cost, and reliable.

Original languageEnglish (US)
Title of host publication2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1-3
Number of pages3
Volume2018-March
ISBN (Electronic)9781538637654
DOIs
StatePublished - Mar 7 2018
Event2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 - Burlingame, United States
Duration: Oct 16 2017Oct 18 2017

Other

Other2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017
CountryUnited States
CityBurlingame
Period10/16/1710/18/17

Fingerprint

Nanotubes
Carbon nanotubes
Silicon
Transistors
Networks (circuits)
Analog circuits
Costs

Keywords

  • carbon nanotube
  • CMOS
  • Physically unclonable
  • PUF
  • Security

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Armstrong, D., Nasri, B., Karri, R., & Shahrjerdi, D. (2018). Hybrid silicon CMOS-carbon nanotube physically unclonable functions. In 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017 (Vol. 2018-March, pp. 1-3). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/S3S.2017.8309206

Hybrid silicon CMOS-carbon nanotube physically unclonable functions. / Armstrong, Darren; Nasri, Bayan; Karri, Ramesh; Shahrjerdi, Davood.

2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. Vol. 2018-March Institute of Electrical and Electronics Engineers Inc., 2018. p. 1-3.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Armstrong, D, Nasri, B, Karri, R & Shahrjerdi, D 2018, Hybrid silicon CMOS-carbon nanotube physically unclonable functions. in 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. vol. 2018-March, Institute of Electrical and Electronics Engineers Inc., pp. 1-3, 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017, Burlingame, United States, 10/16/17. https://doi.org/10.1109/S3S.2017.8309206
Armstrong D, Nasri B, Karri R, Shahrjerdi D. Hybrid silicon CMOS-carbon nanotube physically unclonable functions. In 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. Vol. 2018-March. Institute of Electrical and Electronics Engineers Inc. 2018. p. 1-3 https://doi.org/10.1109/S3S.2017.8309206
Armstrong, Darren ; Nasri, Bayan ; Karri, Ramesh ; Shahrjerdi, Davood. / Hybrid silicon CMOS-carbon nanotube physically unclonable functions. 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017. Vol. 2018-March Institute of Electrical and Electronics Engineers Inc., 2018. pp. 1-3
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