High mobility strained Ge MOSFETs with high-k gate dielectric on Si

Joseph P. Donnelly, David Q. Kelly, Sachin Joshi, Sagnik Dey, Davood Shahrjerdi, Issac Wiedeman, Doreen Ahmad, Sanjay K. Banerjee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Conventional scaling of bulk CMOS devices appears to have been stymied in recent years, leading to a flurry of activity in multi-gate and enhanced channel mobility MOSFETs With the advent of low leakage and low equivalent oxide thickness (EOT) high-k gate dielectrics, the limitation of Ge MOSFETs of not having a stable high-quality native gate oxide, has been mitigated and high mobility Ge channel MOSFETs have been demonstrated. Additionally, the lower band gap of Ge with the higher mobility should increase carrier injection from the source to the channel above that of Si. However, bulk Ge MOSFETs are limited by Ge substrates which are more expensive, fragile and have worse thermal conductivity than Si. Germanium channel MOSFETs fabricated on a Si substrate, incorporate the Ge channel either on a thick relaxed Si1-xGe x buffer layer or a strained Ge-on-insulator (SGOI) substrate, followed by a pure Ge epi layer. However such schemes are expensive and require complex processing. In this talk, we will discuss various schemes to circumvent some of these limitations. In one approach, Ge channels comparable to the inversion layer thickness were grown directly on Si substrates using a low temperature (∼370° C) ultra high vacuum-chemical vapor deposition (UHV-CVD). This technique requires neither an expensive starting substrate nor complex thick relaxed buffer layers. Thin (∼15nm) compressively-strained selective epitaxial grown (SEG) Ge film were achieved on small open Si active areas by ultra high vacuum-chemical vapor deposition (UHV-CVD). It was subsequently capped with a hafnium oxide gate dielectric at room temperature and then annealed. SEG growth and capping the Ge layers prior to thermal processing improve the stability of the layers, and the roughness of the epitaxial films. The compressively-strained Ge PMOSFETs show a ∼2X enhancements in drive current compared to Si devices. In other approaches, we have used thin, strained Ge buffer layers with rapidly varying Ge mole fractions to deflect threading dislocations away from the top Ge epitaxial layer. In yet another scheme, we have grown Ge:C partially strain compensated epitaxial films on Si in order to increase the allowable thermal budgets for MOSFET fabrication, and demonstrated enhanced hole mobilities in pMOSFETs compared to Si devices.

Original languageEnglish (US)
Title of host publication2005 International Semiconductor Device Research Symposium
Pages150
Number of pages1
Volume2005
StatePublished - 2005
Event2005 International Semiconductor Device Research Symposium - Bethesda, MD, United States
Duration: Dec 7 2005Dec 9 2005

Other

Other2005 International Semiconductor Device Research Symposium
CountryUnited States
CityBethesda, MD
Period12/7/0512/9/05

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Gate dielectrics
Buffer layers
Substrates
Epitaxial films
Ultrahigh vacuum
Chemical vapor deposition
Hafnium oxides
Inversion layers
Hole mobility
Oxides
Epitaxial layers
Dislocations (crystals)
Germanium
Epitaxial growth
Thermal conductivity
Energy gap
Surface roughness
Fabrication
Temperature
Processing

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Donnelly, J. P., Kelly, D. Q., Joshi, S., Dey, S., Shahrjerdi, D., Wiedeman, I., ... Banerjee, S. K. (2005). High mobility strained Ge MOSFETs with high-k gate dielectric on Si. In 2005 International Semiconductor Device Research Symposium (Vol. 2005, pp. 150). [1596025]

High mobility strained Ge MOSFETs with high-k gate dielectric on Si. / Donnelly, Joseph P.; Kelly, David Q.; Joshi, Sachin; Dey, Sagnik; Shahrjerdi, Davood; Wiedeman, Issac; Ahmad, Doreen; Banerjee, Sanjay K.

2005 International Semiconductor Device Research Symposium. Vol. 2005 2005. p. 150 1596025.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Donnelly, JP, Kelly, DQ, Joshi, S, Dey, S, Shahrjerdi, D, Wiedeman, I, Ahmad, D & Banerjee, SK 2005, High mobility strained Ge MOSFETs with high-k gate dielectric on Si. in 2005 International Semiconductor Device Research Symposium. vol. 2005, 1596025, pp. 150, 2005 International Semiconductor Device Research Symposium, Bethesda, MD, United States, 12/7/05.
Donnelly JP, Kelly DQ, Joshi S, Dey S, Shahrjerdi D, Wiedeman I et al. High mobility strained Ge MOSFETs with high-k gate dielectric on Si. In 2005 International Semiconductor Device Research Symposium. Vol. 2005. 2005. p. 150. 1596025
Donnelly, Joseph P. ; Kelly, David Q. ; Joshi, Sachin ; Dey, Sagnik ; Shahrjerdi, Davood ; Wiedeman, Issac ; Ahmad, Doreen ; Banerjee, Sanjay K. / High mobility strained Ge MOSFETs with high-k gate dielectric on Si. 2005 International Semiconductor Device Research Symposium. Vol. 2005 2005. pp. 150
@inproceedings{f380287b3b814bce83804c361b38e434,
title = "High mobility strained Ge MOSFETs with high-k gate dielectric on Si",
abstract = "Conventional scaling of bulk CMOS devices appears to have been stymied in recent years, leading to a flurry of activity in multi-gate and enhanced channel mobility MOSFETs With the advent of low leakage and low equivalent oxide thickness (EOT) high-k gate dielectrics, the limitation of Ge MOSFETs of not having a stable high-quality native gate oxide, has been mitigated and high mobility Ge channel MOSFETs have been demonstrated. Additionally, the lower band gap of Ge with the higher mobility should increase carrier injection from the source to the channel above that of Si. However, bulk Ge MOSFETs are limited by Ge substrates which are more expensive, fragile and have worse thermal conductivity than Si. Germanium channel MOSFETs fabricated on a Si substrate, incorporate the Ge channel either on a thick relaxed Si1-xGe x buffer layer or a strained Ge-on-insulator (SGOI) substrate, followed by a pure Ge epi layer. However such schemes are expensive and require complex processing. In this talk, we will discuss various schemes to circumvent some of these limitations. In one approach, Ge channels comparable to the inversion layer thickness were grown directly on Si substrates using a low temperature (∼370° C) ultra high vacuum-chemical vapor deposition (UHV-CVD). This technique requires neither an expensive starting substrate nor complex thick relaxed buffer layers. Thin (∼15nm) compressively-strained selective epitaxial grown (SEG) Ge film were achieved on small open Si active areas by ultra high vacuum-chemical vapor deposition (UHV-CVD). It was subsequently capped with a hafnium oxide gate dielectric at room temperature and then annealed. SEG growth and capping the Ge layers prior to thermal processing improve the stability of the layers, and the roughness of the epitaxial films. The compressively-strained Ge PMOSFETs show a ∼2X enhancements in drive current compared to Si devices. In other approaches, we have used thin, strained Ge buffer layers with rapidly varying Ge mole fractions to deflect threading dislocations away from the top Ge epitaxial layer. In yet another scheme, we have grown Ge:C partially strain compensated epitaxial films on Si in order to increase the allowable thermal budgets for MOSFET fabrication, and demonstrated enhanced hole mobilities in pMOSFETs compared to Si devices.",
author = "Donnelly, {Joseph P.} and Kelly, {David Q.} and Sachin Joshi and Sagnik Dey and Davood Shahrjerdi and Issac Wiedeman and Doreen Ahmad and Banerjee, {Sanjay K.}",
year = "2005",
language = "English (US)",
isbn = "1424400848",
volume = "2005",
pages = "150",
booktitle = "2005 International Semiconductor Device Research Symposium",

}

TY - GEN

T1 - High mobility strained Ge MOSFETs with high-k gate dielectric on Si

AU - Donnelly, Joseph P.

AU - Kelly, David Q.

AU - Joshi, Sachin

AU - Dey, Sagnik

AU - Shahrjerdi, Davood

AU - Wiedeman, Issac

AU - Ahmad, Doreen

AU - Banerjee, Sanjay K.

PY - 2005

Y1 - 2005

N2 - Conventional scaling of bulk CMOS devices appears to have been stymied in recent years, leading to a flurry of activity in multi-gate and enhanced channel mobility MOSFETs With the advent of low leakage and low equivalent oxide thickness (EOT) high-k gate dielectrics, the limitation of Ge MOSFETs of not having a stable high-quality native gate oxide, has been mitigated and high mobility Ge channel MOSFETs have been demonstrated. Additionally, the lower band gap of Ge with the higher mobility should increase carrier injection from the source to the channel above that of Si. However, bulk Ge MOSFETs are limited by Ge substrates which are more expensive, fragile and have worse thermal conductivity than Si. Germanium channel MOSFETs fabricated on a Si substrate, incorporate the Ge channel either on a thick relaxed Si1-xGe x buffer layer or a strained Ge-on-insulator (SGOI) substrate, followed by a pure Ge epi layer. However such schemes are expensive and require complex processing. In this talk, we will discuss various schemes to circumvent some of these limitations. In one approach, Ge channels comparable to the inversion layer thickness were grown directly on Si substrates using a low temperature (∼370° C) ultra high vacuum-chemical vapor deposition (UHV-CVD). This technique requires neither an expensive starting substrate nor complex thick relaxed buffer layers. Thin (∼15nm) compressively-strained selective epitaxial grown (SEG) Ge film were achieved on small open Si active areas by ultra high vacuum-chemical vapor deposition (UHV-CVD). It was subsequently capped with a hafnium oxide gate dielectric at room temperature and then annealed. SEG growth and capping the Ge layers prior to thermal processing improve the stability of the layers, and the roughness of the epitaxial films. The compressively-strained Ge PMOSFETs show a ∼2X enhancements in drive current compared to Si devices. In other approaches, we have used thin, strained Ge buffer layers with rapidly varying Ge mole fractions to deflect threading dislocations away from the top Ge epitaxial layer. In yet another scheme, we have grown Ge:C partially strain compensated epitaxial films on Si in order to increase the allowable thermal budgets for MOSFET fabrication, and demonstrated enhanced hole mobilities in pMOSFETs compared to Si devices.

AB - Conventional scaling of bulk CMOS devices appears to have been stymied in recent years, leading to a flurry of activity in multi-gate and enhanced channel mobility MOSFETs With the advent of low leakage and low equivalent oxide thickness (EOT) high-k gate dielectrics, the limitation of Ge MOSFETs of not having a stable high-quality native gate oxide, has been mitigated and high mobility Ge channel MOSFETs have been demonstrated. Additionally, the lower band gap of Ge with the higher mobility should increase carrier injection from the source to the channel above that of Si. However, bulk Ge MOSFETs are limited by Ge substrates which are more expensive, fragile and have worse thermal conductivity than Si. Germanium channel MOSFETs fabricated on a Si substrate, incorporate the Ge channel either on a thick relaxed Si1-xGe x buffer layer or a strained Ge-on-insulator (SGOI) substrate, followed by a pure Ge epi layer. However such schemes are expensive and require complex processing. In this talk, we will discuss various schemes to circumvent some of these limitations. In one approach, Ge channels comparable to the inversion layer thickness were grown directly on Si substrates using a low temperature (∼370° C) ultra high vacuum-chemical vapor deposition (UHV-CVD). This technique requires neither an expensive starting substrate nor complex thick relaxed buffer layers. Thin (∼15nm) compressively-strained selective epitaxial grown (SEG) Ge film were achieved on small open Si active areas by ultra high vacuum-chemical vapor deposition (UHV-CVD). It was subsequently capped with a hafnium oxide gate dielectric at room temperature and then annealed. SEG growth and capping the Ge layers prior to thermal processing improve the stability of the layers, and the roughness of the epitaxial films. The compressively-strained Ge PMOSFETs show a ∼2X enhancements in drive current compared to Si devices. In other approaches, we have used thin, strained Ge buffer layers with rapidly varying Ge mole fractions to deflect threading dislocations away from the top Ge epitaxial layer. In yet another scheme, we have grown Ge:C partially strain compensated epitaxial films on Si in order to increase the allowable thermal budgets for MOSFET fabrication, and demonstrated enhanced hole mobilities in pMOSFETs compared to Si devices.

UR - http://www.scopus.com/inward/record.url?scp=33847217265&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33847217265&partnerID=8YFLogxK

M3 - Conference contribution

SN - 1424400848

SN - 9781424400843

VL - 2005

SP - 150

BT - 2005 International Semiconductor Device Research Symposium

ER -