Exploring the design space of self-regulating power-aware on/off interconnection networks

Vassos Soteriou Soteriou, Li Shiuan Peh

    Research output: Contribution to journalArticle

    Abstract

    With power consumption becoming increasingly critical in interconnected systems, power-aware networks will become part-and-parcel of many single-chip and multichip systems. As communication links consume significant power regardless of utilization, a mechanism to realize such power-aware networks is on/off links - network links that can be turned on/off as a function of traffic. In this paper, we investigate and propose self-regulating power-aware interconnection networks that turn their links on/off in response to bursts and dips in traffic in a distributed fashion. We explore the design space of such on/off networks, outlining a 5-step design methodology along with various building block solutions at each step that can be effectively assembled to develop various on/off network designs. We applied our methodology to the design of two classes of on/off networks with links that possess substantially different on/off delays, an on-chip network as well as a chip-to-chip network, and show that our designs are able to adapt dynamically to variations in network traffic. Three specific network designs are then constructed, presented, and evaluated. Our simulations show that link power consumption can be reduced by up to 54.4 percent, with a modest increase in network latency.

    Original languageEnglish (US)
    Pages (from-to)393-408
    Number of pages16
    JournalIEEE Transactions on Parallel and Distributed Systems
    Volume18
    Issue number3
    DOIs
    StatePublished - Mar 1 2007

    Fingerprint

    Electric power utilization
    Electric power system interconnection
    Telecommunication links
    Network-on-chip

    Keywords

    • Communication link
    • Interconnection networks
    • Low-power design
    • Network topology
    • On/off mechanism
    • Routing algorithm

    ASJC Scopus subject areas

    • Signal Processing
    • Hardware and Architecture
    • Computational Theory and Mathematics

    Cite this

    Exploring the design space of self-regulating power-aware on/off interconnection networks. / Soteriou, Vassos Soteriou; Peh, Li Shiuan.

    In: IEEE Transactions on Parallel and Distributed Systems, Vol. 18, No. 3, 01.03.2007, p. 393-408.

    Research output: Contribution to journalArticle

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