Engineering plasmons in graphene nanostructures in the THZ frequencies: Compact modeling and peformance analysis for on-chip interconnects

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish (US)
Title of host publicationThe International Conference on Simulation of Semiconductor Processes and Devices (SIS-PAD). Washington, DC. Sept. 9 - 11, 2015
StatePublished - 2015

Cite this

Rakheja, S. (2015). Engineering plasmons in graphene nanostructures in the THZ frequencies: Compact modeling and peformance analysis for on-chip interconnects. In The International Conference on Simulation of Semiconductor Processes and Devices (SIS-PAD). Washington, DC. Sept. 9 - 11, 2015

Engineering plasmons in graphene nanostructures in the THZ frequencies : Compact modeling and peformance analysis for on-chip interconnects. / Rakheja, Shaloo.

The International Conference on Simulation of Semiconductor Processes and Devices (SIS-PAD). Washington, DC. Sept. 9 - 11, 2015. 2015.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Rakheja, S 2015, Engineering plasmons in graphene nanostructures in the THZ frequencies: Compact modeling and peformance analysis for on-chip interconnects. in The International Conference on Simulation of Semiconductor Processes and Devices (SIS-PAD). Washington, DC. Sept. 9 - 11, 2015.
Rakheja S. Engineering plasmons in graphene nanostructures in the THZ frequencies: Compact modeling and peformance analysis for on-chip interconnects. In The International Conference on Simulation of Semiconductor Processes and Devices (SIS-PAD). Washington, DC. Sept. 9 - 11, 2015. 2015
Rakheja, Shaloo. / Engineering plasmons in graphene nanostructures in the THZ frequencies : Compact modeling and peformance analysis for on-chip interconnects. The International Conference on Simulation of Semiconductor Processes and Devices (SIS-PAD). Washington, DC. Sept. 9 - 11, 2015. 2015.
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