DESIGN ARCHITECTURES OF A DTDM PACKET ASSEMBLER AND PACKET MULTIPLEXER.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Dynamic time-division multiplexing (DTDM) combines the concepts of conventional time-division multiplexing and packet transmission. A simple modularized packet assembler to multiplex different broadband services into a DTDM-format serial bit stream is described. A novel multiple-input-output statistical packet multiplex is then presented that concentrates network traffic for more efficient use of transmission facilities. A CMOS VLSI chip designed for use in the packet assembler and packet multiplexer is discussed.

Original languageEnglish (US)
Title of host publicationIEEE Proceedings MONTECH, Montreal, Canada, November 1987
PublisherIEEE
Pages83-87
Number of pages5
StatePublished - 1987

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Time division multiplexing

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Chao, H. J. (1987). DESIGN ARCHITECTURES OF A DTDM PACKET ASSEMBLER AND PACKET MULTIPLEXER. In IEEE Proceedings MONTECH, Montreal, Canada, November 1987 (pp. 83-87). IEEE.

DESIGN ARCHITECTURES OF A DTDM PACKET ASSEMBLER AND PACKET MULTIPLEXER. / Chao, H. Jonathan.

IEEE Proceedings MONTECH, Montreal, Canada, November 1987. IEEE, 1987. p. 83-87.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Chao, HJ 1987, DESIGN ARCHITECTURES OF A DTDM PACKET ASSEMBLER AND PACKET MULTIPLEXER. in IEEE Proceedings MONTECH, Montreal, Canada, November 1987. IEEE, pp. 83-87.
Chao HJ. DESIGN ARCHITECTURES OF A DTDM PACKET ASSEMBLER AND PACKET MULTIPLEXER. In IEEE Proceedings MONTECH, Montreal, Canada, November 1987. IEEE. 1987. p. 83-87
Chao, H. Jonathan. / DESIGN ARCHITECTURES OF A DTDM PACKET ASSEMBLER AND PACKET MULTIPLEXER. IEEE Proceedings MONTECH, Montreal, Canada, November 1987. IEEE, 1987. pp. 83-87
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