Cost-effective layer transfer by controlled spalling technology

S. W. Bedell, Davood Shahrjerdi, K. Fogel, P. Lauro, B. Hekmatshoar, N. Li, J. A. Ott, D. K. Sadana

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Although historically studied as a failure mode, substrate spalling can be transformed into a versatile layer transfer method by carefully controlling the thickness and intrinsic stress of a surface layer, and mechanically guiding the fracture path. This Controlled Spalling process requires no specialized equipment and can be applied to essentially any brittle substrate. We have successfully demonstrated i) device fabrication in Si, Ge, and III-V based materials, ii) removal of fully-processed CMOS circuits, iii) kerffree ingot slicing, iv) 300 mm diameter layer transfer and v) a wide range of other materials such as GaN grown on sapphire.

Original languageEnglish (US)
Title of host publicationSemiconductor Wafer Bonding 12: Science, Technology, and Applications
Pages315-323
Number of pages9
Volume50
Edition7
DOIs
StatePublished - 2012
Event12th International Symposium on Semiconductor Wafer Bonding: Science, Technology, and Applications - ECS Fall 2012 Meeting - Honolulu, HI, United States
Duration: Oct 7 2012Oct 12 2012

Other

Other12th International Symposium on Semiconductor Wafer Bonding: Science, Technology, and Applications - ECS Fall 2012 Meeting
CountryUnited States
CityHonolulu, HI
Period10/7/1210/12/12

Fingerprint

Spalling
Substrates
Ingots
Sapphire
Failure modes
Costs
Fabrication
Networks (circuits)

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Bedell, S. W., Shahrjerdi, D., Fogel, K., Lauro, P., Hekmatshoar, B., Li, N., ... Sadana, D. K. (2012). Cost-effective layer transfer by controlled spalling technology. In Semiconductor Wafer Bonding 12: Science, Technology, and Applications (7 ed., Vol. 50, pp. 315-323) https://doi.org/10.1149/05007.0315ecst

Cost-effective layer transfer by controlled spalling technology. / Bedell, S. W.; Shahrjerdi, Davood; Fogel, K.; Lauro, P.; Hekmatshoar, B.; Li, N.; Ott, J. A.; Sadana, D. K.

Semiconductor Wafer Bonding 12: Science, Technology, and Applications. Vol. 50 7. ed. 2012. p. 315-323.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bedell, SW, Shahrjerdi, D, Fogel, K, Lauro, P, Hekmatshoar, B, Li, N, Ott, JA & Sadana, DK 2012, Cost-effective layer transfer by controlled spalling technology. in Semiconductor Wafer Bonding 12: Science, Technology, and Applications. 7 edn, vol. 50, pp. 315-323, 12th International Symposium on Semiconductor Wafer Bonding: Science, Technology, and Applications - ECS Fall 2012 Meeting, Honolulu, HI, United States, 10/7/12. https://doi.org/10.1149/05007.0315ecst
Bedell SW, Shahrjerdi D, Fogel K, Lauro P, Hekmatshoar B, Li N et al. Cost-effective layer transfer by controlled spalling technology. In Semiconductor Wafer Bonding 12: Science, Technology, and Applications. 7 ed. Vol. 50. 2012. p. 315-323 https://doi.org/10.1149/05007.0315ecst
Bedell, S. W. ; Shahrjerdi, Davood ; Fogel, K. ; Lauro, P. ; Hekmatshoar, B. ; Li, N. ; Ott, J. A. ; Sadana, D. K. / Cost-effective layer transfer by controlled spalling technology. Semiconductor Wafer Bonding 12: Science, Technology, and Applications. Vol. 50 7. ed. 2012. pp. 315-323
@inproceedings{210322469099431db8ae2193b47f532b,
title = "Cost-effective layer transfer by controlled spalling technology",
abstract = "Although historically studied as a failure mode, substrate spalling can be transformed into a versatile layer transfer method by carefully controlling the thickness and intrinsic stress of a surface layer, and mechanically guiding the fracture path. This Controlled Spalling process requires no specialized equipment and can be applied to essentially any brittle substrate. We have successfully demonstrated i) device fabrication in Si, Ge, and III-V based materials, ii) removal of fully-processed CMOS circuits, iii) kerffree ingot slicing, iv) 300 mm diameter layer transfer and v) a wide range of other materials such as GaN grown on sapphire.",
author = "Bedell, {S. W.} and Davood Shahrjerdi and K. Fogel and P. Lauro and B. Hekmatshoar and N. Li and Ott, {J. A.} and Sadana, {D. K.}",
year = "2012",
doi = "10.1149/05007.0315ecst",
language = "English (US)",
isbn = "9781607683551",
volume = "50",
pages = "315--323",
booktitle = "Semiconductor Wafer Bonding 12: Science, Technology, and Applications",
edition = "7",

}

TY - GEN

T1 - Cost-effective layer transfer by controlled spalling technology

AU - Bedell, S. W.

AU - Shahrjerdi, Davood

AU - Fogel, K.

AU - Lauro, P.

AU - Hekmatshoar, B.

AU - Li, N.

AU - Ott, J. A.

AU - Sadana, D. K.

PY - 2012

Y1 - 2012

N2 - Although historically studied as a failure mode, substrate spalling can be transformed into a versatile layer transfer method by carefully controlling the thickness and intrinsic stress of a surface layer, and mechanically guiding the fracture path. This Controlled Spalling process requires no specialized equipment and can be applied to essentially any brittle substrate. We have successfully demonstrated i) device fabrication in Si, Ge, and III-V based materials, ii) removal of fully-processed CMOS circuits, iii) kerffree ingot slicing, iv) 300 mm diameter layer transfer and v) a wide range of other materials such as GaN grown on sapphire.

AB - Although historically studied as a failure mode, substrate spalling can be transformed into a versatile layer transfer method by carefully controlling the thickness and intrinsic stress of a surface layer, and mechanically guiding the fracture path. This Controlled Spalling process requires no specialized equipment and can be applied to essentially any brittle substrate. We have successfully demonstrated i) device fabrication in Si, Ge, and III-V based materials, ii) removal of fully-processed CMOS circuits, iii) kerffree ingot slicing, iv) 300 mm diameter layer transfer and v) a wide range of other materials such as GaN grown on sapphire.

UR - http://www.scopus.com/inward/record.url?scp=84885798097&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84885798097&partnerID=8YFLogxK

U2 - 10.1149/05007.0315ecst

DO - 10.1149/05007.0315ecst

M3 - Conference contribution

SN - 9781607683551

VL - 50

SP - 315

EP - 323

BT - Semiconductor Wafer Bonding 12: Science, Technology, and Applications

ER -