CNP: An FPGA-based processor for Convolutional Networks

Clément Farabet, Cyril Poulet, Jefferson Y. Han, Yann LeCun

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Convolutional Networks (ConvNets) are biologically-inspired hierarchical architectures that can be trained to perform a variety of detection, recognition and segmentation tasks. ConvNets have a feed-forward architecture consisting of multiple linear convolution filters interspersed with point-wise non-linear squashing functions. This paper presents an efficient implementation of ConvNets on a low-end DSP-oriented Field Programmable Gate Array (FPGA). The implementation exploits the inherent parallelism of ConvNets and takes full advantage of multiple hardware multiply-accumulate units on the FPGA. The entire system uses a single FPGA with an external memory module, and no extra parts. A network compiler software was implemented, which takes a description of a trained ConvNet and compiles it into a sequence of instructions for the ConvNet Processor (CNP). A ConvNet face detection system was implemented and tested. Face detection on a 512 x 384 frame takes 100ms (10 frames per second), which corresponds to an average performance of 3:4x109 connections per second for this 340 million connection network. The design can be used for low-power, lightweight embedded vision systems for micro-UAVs and other small robots.

Original languageEnglish (US)
Title of host publicationFPL 09: 19th International Conference on Field Programmable Logic and Applications
Pages32-37
Number of pages6
DOIs
StatePublished - 2009
EventFPL 09: 19th International Conference on Field Programmable Logic and Applications - Prague, Czech Republic
Duration: Aug 31 2009Sep 2 2009

Other

OtherFPL 09: 19th International Conference on Field Programmable Logic and Applications
CountryCzech Republic
CityPrague
Period8/31/099/2/09

Fingerprint

Field programmable gate arrays (FPGA)
Face recognition
Unmanned aerial vehicles (UAV)
Convolution
Robots
Hardware
Data storage equipment

ASJC Scopus subject areas

  • Computational Theory and Mathematics
  • Computer Science Applications

Cite this

Farabet, C., Poulet, C., Han, J. Y., & LeCun, Y. (2009). CNP: An FPGA-based processor for Convolutional Networks. In FPL 09: 19th International Conference on Field Programmable Logic and Applications (pp. 32-37). [5272559] https://doi.org/10.1109/FPL.2009.5272559

CNP : An FPGA-based processor for Convolutional Networks. / Farabet, Clément; Poulet, Cyril; Han, Jefferson Y.; LeCun, Yann.

FPL 09: 19th International Conference on Field Programmable Logic and Applications. 2009. p. 32-37 5272559.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Farabet, C, Poulet, C, Han, JY & LeCun, Y 2009, CNP: An FPGA-based processor for Convolutional Networks. in FPL 09: 19th International Conference on Field Programmable Logic and Applications., 5272559, pp. 32-37, FPL 09: 19th International Conference on Field Programmable Logic and Applications, Prague, Czech Republic, 8/31/09. https://doi.org/10.1109/FPL.2009.5272559
Farabet C, Poulet C, Han JY, LeCun Y. CNP: An FPGA-based processor for Convolutional Networks. In FPL 09: 19th International Conference on Field Programmable Logic and Applications. 2009. p. 32-37. 5272559 https://doi.org/10.1109/FPL.2009.5272559
Farabet, Clément ; Poulet, Cyril ; Han, Jefferson Y. ; LeCun, Yann. / CNP : An FPGA-based processor for Convolutional Networks. FPL 09: 19th International Conference on Field Programmable Logic and Applications. 2009. pp. 32-37
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