Clotho: Proactive wearout deceleration in Chip-Multiprocessor interconnects

Arseniy Vitkovskiy, Vassos Soteriou Soteriou, Paul V. Gratz

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

With advancing process technology, Chip-Multiprocessors (CMPs) are experiencing ever worsening reliability due to prolonged operational stresses. The network-on-chip that interconnects the components of CMPs is especially vulnerable to such wearout-induced failure. To tackle this ominous threat we present Clotho, a novel, wearout-Aware routing algorithm. Clotho continuously considers the stresses the on-chip interconnect experiences at runtime, along with temperature and fabrication process variation metrics, steering traffic away from locations that are most prone to Electromigration (EM)-and Hot-Carrier Injection (HCI)-induced wear. Under realistic workloads Clotho yields 66% and 8% average increases in mean time to failure for EM and HCI, respectively.

Original languageEnglish (US)
Title of host publicationProceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages117-124
Number of pages8
ISBN (Electronic)9781467371650
DOIs
StatePublished - Dec 14 2015
Event33rd IEEE International Conference on Computer Design, ICCD 2015 - New York City, United States
Duration: Oct 18 2015Oct 21 2015

Other

Other33rd IEEE International Conference on Computer Design, ICCD 2015
CountryUnited States
CityNew York City
Period10/18/1510/21/15

Fingerprint

Hot carriers
Electromigration
Deceleration
Routing algorithms
Wear of materials
Fabrication
Temperature
Network-on-chip

ASJC Scopus subject areas

  • Computer Graphics and Computer-Aided Design
  • Computer Science Applications

Cite this

Vitkovskiy, A., Soteriou, V. S., & Gratz, P. V. (2015). Clotho: Proactive wearout deceleration in Chip-Multiprocessor interconnects. In Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015 (pp. 117-124). [7357092] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCD.2015.7357092

Clotho : Proactive wearout deceleration in Chip-Multiprocessor interconnects. / Vitkovskiy, Arseniy; Soteriou, Vassos Soteriou; Gratz, Paul V.

Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 117-124 7357092.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Vitkovskiy, A, Soteriou, VS & Gratz, PV 2015, Clotho: Proactive wearout deceleration in Chip-Multiprocessor interconnects. in Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015., 7357092, Institute of Electrical and Electronics Engineers Inc., pp. 117-124, 33rd IEEE International Conference on Computer Design, ICCD 2015, New York City, United States, 10/18/15. https://doi.org/10.1109/ICCD.2015.7357092
Vitkovskiy A, Soteriou VS, Gratz PV. Clotho: Proactive wearout deceleration in Chip-Multiprocessor interconnects. In Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015. Institute of Electrical and Electronics Engineers Inc. 2015. p. 117-124. 7357092 https://doi.org/10.1109/ICCD.2015.7357092
Vitkovskiy, Arseniy ; Soteriou, Vassos Soteriou ; Gratz, Paul V. / Clotho : Proactive wearout deceleration in Chip-Multiprocessor interconnects. Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 117-124
@inproceedings{b1b68753034d450f9ffa08b2f4c33822,
title = "Clotho: Proactive wearout deceleration in Chip-Multiprocessor interconnects",
abstract = "With advancing process technology, Chip-Multiprocessors (CMPs) are experiencing ever worsening reliability due to prolonged operational stresses. The network-on-chip that interconnects the components of CMPs is especially vulnerable to such wearout-induced failure. To tackle this ominous threat we present Clotho, a novel, wearout-Aware routing algorithm. Clotho continuously considers the stresses the on-chip interconnect experiences at runtime, along with temperature and fabrication process variation metrics, steering traffic away from locations that are most prone to Electromigration (EM)-and Hot-Carrier Injection (HCI)-induced wear. Under realistic workloads Clotho yields 66{\%} and 8{\%} average increases in mean time to failure for EM and HCI, respectively.",
author = "Arseniy Vitkovskiy and Soteriou, {Vassos Soteriou} and Gratz, {Paul V.}",
year = "2015",
month = "12",
day = "14",
doi = "10.1109/ICCD.2015.7357092",
language = "English (US)",
pages = "117--124",
booktitle = "Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - Clotho

T2 - Proactive wearout deceleration in Chip-Multiprocessor interconnects

AU - Vitkovskiy, Arseniy

AU - Soteriou, Vassos Soteriou

AU - Gratz, Paul V.

PY - 2015/12/14

Y1 - 2015/12/14

N2 - With advancing process technology, Chip-Multiprocessors (CMPs) are experiencing ever worsening reliability due to prolonged operational stresses. The network-on-chip that interconnects the components of CMPs is especially vulnerable to such wearout-induced failure. To tackle this ominous threat we present Clotho, a novel, wearout-Aware routing algorithm. Clotho continuously considers the stresses the on-chip interconnect experiences at runtime, along with temperature and fabrication process variation metrics, steering traffic away from locations that are most prone to Electromigration (EM)-and Hot-Carrier Injection (HCI)-induced wear. Under realistic workloads Clotho yields 66% and 8% average increases in mean time to failure for EM and HCI, respectively.

AB - With advancing process technology, Chip-Multiprocessors (CMPs) are experiencing ever worsening reliability due to prolonged operational stresses. The network-on-chip that interconnects the components of CMPs is especially vulnerable to such wearout-induced failure. To tackle this ominous threat we present Clotho, a novel, wearout-Aware routing algorithm. Clotho continuously considers the stresses the on-chip interconnect experiences at runtime, along with temperature and fabrication process variation metrics, steering traffic away from locations that are most prone to Electromigration (EM)-and Hot-Carrier Injection (HCI)-induced wear. Under realistic workloads Clotho yields 66% and 8% average increases in mean time to failure for EM and HCI, respectively.

UR - http://www.scopus.com/inward/record.url?scp=84962422647&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84962422647&partnerID=8YFLogxK

U2 - 10.1109/ICCD.2015.7357092

DO - 10.1109/ICCD.2015.7357092

M3 - Conference contribution

AN - SCOPUS:84962422647

SP - 117

EP - 124

BT - Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015

PB - Institute of Electrical and Electronics Engineers Inc.

ER -