An approach to tolerate process related variations in memristor-based applications

Jeyavijayan Rajendran, Harika Maenm, Ramesh Karri, Garrett S. Rose

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Memristors have been proposed to be used in a wide variety of applications ranging from neural networks to memory to digital logic. Like other electronic devices, memristors are also prone to process variations. We show that the effect of process induced variations in the thickness of the oxide layer of a memristor has a non-linear relationship with memristance. We analyze the effects of process variation on memristor-based threshold gates. We propose two algorithms to tolerate variations on memristance based on two different constraints. One is used to determine the memristance values for a given list of Boolean functions to tolerate a maximum amount of variation. The other is used to determine the list of Boolean functions that can tolerate a maximum amount of variation for given memristance values. Finally, we analyze the performance of memristor-based threshold gates to tolerate variations.

Original languageEnglish (US)
Title of host publicationProceedings - 24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems
Pages18-23
Number of pages6
DOIs
StatePublished - 2011
Event24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems - Chennai, India
Duration: Jan 2 2011Jan 7 2011

Other

Other24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems
CountryIndia
CityChennai
Period1/2/111/7/11

Fingerprint

Memristors
Boolean functions
Neural networks
Data storage equipment
Oxides

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture

Cite this

Rajendran, J., Maenm, H., Karri, R., & Rose, G. S. (2011). An approach to tolerate process related variations in memristor-based applications. In Proceedings - 24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems (pp. 18-23). [5718771] https://doi.org/10.1109/VLSID.2011.49

An approach to tolerate process related variations in memristor-based applications. / Rajendran, Jeyavijayan; Maenm, Harika; Karri, Ramesh; Rose, Garrett S.

Proceedings - 24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems. 2011. p. 18-23 5718771.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Rajendran, J, Maenm, H, Karri, R & Rose, GS 2011, An approach to tolerate process related variations in memristor-based applications. in Proceedings - 24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems., 5718771, pp. 18-23, 24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems, Chennai, India, 1/2/11. https://doi.org/10.1109/VLSID.2011.49
Rajendran J, Maenm H, Karri R, Rose GS. An approach to tolerate process related variations in memristor-based applications. In Proceedings - 24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems. 2011. p. 18-23. 5718771 https://doi.org/10.1109/VLSID.2011.49
Rajendran, Jeyavijayan ; Maenm, Harika ; Karri, Ramesh ; Rose, Garrett S. / An approach to tolerate process related variations in memristor-based applications. Proceedings - 24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems. 2011. pp. 18-23
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