140 MBIT/S CMOS LSI FRAMER CHIP FOR A BROAD-BAND ISDN LOCAL ACCESS SYSTEM.

H. Jonathan Chao, Thomas J. Robe, Lanny S. Smoot

Research output: Contribution to journalArticle

Abstract

A LSI framer chip, which provides a SONET-like time-division-multiplexed frame structure, and which has been implemented in a production 2- mu m CMOS technology, is described. Current samples of the chip have been tested functional to 160 Mb/s. The primary attributes presented include the circuit features used to achieve high-bit-rate operation, the level translation circuits which afford direct interfacing to ECL level clock and data signals, and the functional capabilities which lead to broad application of the chip in communications networks. Several examples of its use in a prototype broadband local access network are also described. The chip operates from a single 5-V supply, dissipates approximately 420 mW, and is packaged in a 68-pin leadless ceramic chip carrier (LCCC) package.

Original languageEnglish (US)
JournalIEEE Journal of Solid-State Circuits
Volume23
Issue number1
StatePublished - Feb 1987

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Emitter coupled logic circuits
Networks (circuits)
Telecommunication networks
Clocks
Broadband ISDN

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

140 MBIT/S CMOS LSI FRAMER CHIP FOR A BROAD-BAND ISDN LOCAL ACCESS SYSTEM. / Chao, H. Jonathan; Robe, Thomas J.; Smoot, Lanny S.

In: IEEE Journal of Solid-State Circuits, Vol. 23, No. 1, 02.1987.

Research output: Contribution to journalArticle

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